公开(公告)号：US20200098644A1

公开(公告)日：2020-03-26

申请号：US16696121

申请日：2019-11-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Feng-Ching Chu ,  Wei-Yang Lee ,  Feng-Cheng Yang ,  Yen-Ming Chen

IPC: H01L21/8238 ,  H01L29/06 ,  H01L27/088 ,  H01L27/092

Abstract: A method of fabricating a fin-like field effect transistor (FinFET) device includes providing a semiconductor substrate having a region for forming p-type metal-oxide-semiconductor (PMOS) devices and a region for forming n-type metal-oxide-semiconductor (PMOS) devices, forming fin structures in both regions of the substrate separated by isolation features, first forming source/drain (S/D) features in the PMOS region, and subsequently forming S/D features in the NMOS region. First forming the PMOS S/D features and then forming the NMOS S/D features results in a greater extent of loss of isolation features in the PMOS region than in the NMOS region.

公开(公告)号：US10522680B2

公开(公告)日：2019-12-31

申请号：US15692471

申请日：2017-08-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Feng-Ching Chu ,  Wei-Yang Lee ,  Feng-Cheng Yang ,  Yen-Ming Chen

IPC: H01L29/78 ,  H01L29/41 ,  H01L27/08 ,  H01L27/092 ,  H01L29/06 ,  H01L29/08 ,  H01L29/161 ,  H01L29/165 ,  H01L29/24 ,  H01L29/267 ,  H01L29/167 ,  H01L23/535 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/417

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a base and a first fin structure over the base. The semiconductor device structure includes an isolation layer over the base. The first fin structure is partially in the isolation layer. The semiconductor device structure includes a first gate structure over and across the first fin structure. The semiconductor device structure includes a first source structure and a first drain structure on the first fin structure and on two opposite sides of the first gate structure. The first source structure and the first drain structure are made of an N-type conductivity material. The semiconductor device structure includes a cap layer covering the first source structure and the first drain structure. The cap layer is doped with a Group IIIA element.

公开(公告)号：US10522420B2

公开(公告)日：2019-12-31

申请号：US16449510

申请日：2019-06-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Feng-Ching Chu ,  Wei-Yang Lee ,  Feng-Cheng Yang ,  Yen-Ming Chen

IPC: H01L21/02 ,  H01L21/8238 ,  H01L29/66 ,  H01L27/092 ,  H01L21/265 ,  H01L29/167 ,  H01L21/762 ,  H01L21/3115 ,  H01L21/027 ,  H01L21/308 ,  H01L29/78 ,  H01L29/165 ,  H01L29/08

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a substrate having a first device region and a second device region, a first fin over the substrate in the first device region, a second fin over the substrate in the second device region, a first epitaxial feature over the first fin in the source/drain region of the first fin, a second epitaxial feature over the second fin in the source/drain region of the second fin, and a dielectric layer on the first and second epitaxial features. The first epitaxial feature is doped with a first dopant of a first conductivity and the second epitaxial feature is doped with a second dopant of a second conductivity different from the first conductivity. The dielectric layer is doped with the first dopant.

公开(公告)号：US10403551B2

公开(公告)日：2019-09-03

申请号：US15806603

申请日：2017-11-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Feng-Ching Chu ,  Wei-Yang Lee ,  Feng-Cheng Yang ,  Yen-Ming Chen

IPC: H01L27/08 ,  H01L21/8238 ,  H01L29/78 ,  H01L29/167 ,  H01L29/165 ,  H01L29/66 ,  H01L21/265 ,  H01L21/02 ,  H01L29/08 ,  H01L27/092 ,  H01L21/762 ,  H01L21/027 ,  H01L21/308

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a substrate having a first device region and a second device region, a first fin over the substrate in the first device region, a second fin over the substrate in the second device region, a first epitaxial feature over the first fin in the source/drain region of the first fin, a second epitaxial feature over the second fin in the source/drain region of the second fin, and a dielectric layer on the first and second epitaxial features. The first epitaxial feature is doped with a first dopant of a first conductivity and the second epitaxial feature is doped with a second dopant of a second conductivity different from the first conductivity. The dielectric layer is doped with the first dopant.