公开(公告)号：US07685482B2

公开(公告)日：2010-03-23

申请号：US11015749

申请日：2004-12-17

Applicant: Robert Warren

Inventor： Robert Warren

IPC: G01R31/28 ,  G01R31/26 ,  G11C29/00

CPC classification number: G01R31/318555 ,  G01R31/318536 ,  G01R31/318552 ,  G01R31/318558 ,  G01R31/318563 ,  G01R31/3187

Abstract: An integrated circuit comprising: at least one test input for receiving test data; test control circuitry between the at least one test input and circuitry to be tested; wherein the test data is clocked in on a rising clock edge and a falling clock edge.

Abstract translation: 一种集成电路，包括：用于接收测试数据的至少一个测试输入; 所述至少一个测试输入和要测试的电路之间的测试控制电路; 其中测试数据在上升时钟沿和下降时钟沿被计时。

公开(公告)号：US07542087B2

公开(公告)日：2009-06-02

申请号：US11154207

申请日：2005-06-16

Applicant: Jeffrey Raynor

Inventor： Jeffrey Raynor

IPC: H04N3/12

CPC classification number: H04N5/232 ,  G03B17/18 ,  H04N5/335 ,  H04N2201/3254

Abstract: An orientation sensor for use with an image sensor is provided, which includes at least two polarizers with different orientations and associated photodetectors and a signal processing unit. The orientation sensor can be incorporated in a digital camera. When the camera is exposed to daylight, which is polarized, the relative outputs from the differently oriented polarizers can be compared to record the orientation of the camera. This orientation can be stored with the image data so that a user does not have to manually change the orientation of an image on an image display device.

Abstract translation: 提供了一种与图像传感器一起使用的方向传感器，其包括具有不同取向的至少两个偏振器和相关联的光电检测器以及信号处理单元。 方向传感器可以结合在数码相机中。 当相机暴露在日光下时，这是极化的，可以比较来自不同方向的偏振器的相对输出以记录相机的方向。 该方向可以与图像数据一起存储，使得用户不必手动地改变图像显示装置上的图像的方向。

公开(公告)号：US07500038B2

公开(公告)日：2009-03-03

申请号：US11119345

申请日：2005-04-29

Applicant: Dave Smith

Inventor： Dave Smith

IPC: G06F13/00

CPC classification number: G06F13/1605 ,  G06F13/362

Abstract: A resource management system including a plurality of requester elements competing to access a resource through an arbiter element that controls access to the resource by the requester elements. A requester element having a buffer unit and first and second counters, which are compared to determine if a request having an identified priority type is in the buffer unit.

Abstract translation: 一种资源管理系统，包括多个请求者元素，所述多个请求者元素通过仲裁器元素竞争访问资源，所述仲裁器元素控制所述请求者元素对所述资源的访问。 具有缓冲器单元和第一和第二计数器的请求器元件，其被比较以确定具有所识别的优先级类型的请求是否在缓冲器单元中。

公开(公告)号：US20080044020A1

公开(公告)日：2008-02-21

申请号：US11675530

申请日：2007-02-15

Applicant: Tom Ryan

Inventor： Tom Ryan

IPC: H04N7/167

CPC classification number: H04N21/4181 ,  G06F21/72 ,  H04N21/42623 ,  H04N21/42692 ,  H04N21/4623

Abstract: A semiconductor integrated circuit for processing content data by encrypting or decrypting the data has one or more inputs to received content and metadata. A metadata store comprises two portions, a first portion for storing metadata itself and a second portion for storing an address of locations of bitfields of metadata. This arrangement allows for efficient storage of the metadata but requires certain rules to ensure that bitfields of metadata cannot be stored and used with anything other than the content with which the metadata is associated.

Abstract translation: 用于通过加密或解密数据来处理内容数据的半导体集成电路具有一个或多个输入以接收内容和元数据。 元数据存储包括两部分，第一部分用于存储元数据本身，第二部分用于存储元数据的位域的位置的地址。 这种安排允许有效地存储元数据，但是需要某些规则来确保元数据的位域不能与元数据所关联的内容以外的任何内容一起存储和使用。

公开(公告)号：US20080034162A1

公开(公告)日：2008-02-07

申请号：US11881400

申请日：2007-07-26

Applicant: Andrew Sturges ,  David May

Inventor： Andrew Sturges ,  David May

IPC: G06F13/14

CPC classification number: G06F12/0804 ,  G06F12/0842 ,  G06F12/0848 ,  G06F12/0864 ,  G06F12/1045

Abstract: A cache system is provided which includes a cache memory and a cache refill mechanism which allocates one or more of a set of cache partitions in the cache memory to an item in dependence on the address of the item in main memory. This is achieved in one of the described embodiments by including with the address of an item a set of partition selector bits which allow a partition mask to be generated to identify into which cache partition the item may be loaded.

公开(公告)号：US20070121943A1

公开(公告)日：2007-05-31

申请号：US11523773

申请日：2006-09-18

Applicant: Andrew Dellow ,  Rodrigo Cordero

Inventor： Andrew Dellow ,  Rodrigo Cordero

IPC: H04K1/02

CPC classification number: H04L9/0662 ,  H04L2209/04 ,  H04L2209/12

Abstract: A portion of data is obfuscated by performing a bitwise XOR function between bits of the data portion and bits of a mask. The mask is generated based on the memory address of the data portion. A bitfield representing the memory address of the data portion is split into subset bitfields. Each subset then forms the input of a corresponding primary randomizing unit. Each primary randomizing unit is arranged to generate an output bitfield that appears to be randomly correlated with the input, but which may be determined from the input if certain secret information is known. The output of the primary randomizing units is input into a series of secondary randomizing units. Each secondary randomizing unit is arranged to input at least one bit of the output of every primary randomizing unit. The output of the secondary randomizing units are then combined by concatenation to form a data mask.

Abstract translation: 通过在数据部分的位和掩码的位之间执行按位XOR功能来模糊数据的一部分。 基于数据部分的存储器地址生成掩码。 表示数据部分的存储器地址的位字段被分割成子字段。 然后，每个子集形成对应的主随机化单元的输入。 每个主随机化单元被安排成产生似乎与输入随机相关的输出位域，但是如果某些秘密信息是已知的，则可以从输入确定输出位域。 主随机化单元的输出被输入到一系列二次随机化单元中。 每个二次随机化单元被布置成输入每个主随机化单元的输出的至少一位。 然后通过级联组合二次随机化单元的输出以形成数据掩码。

公开(公告)号：US07200843B2

公开(公告)日：2007-04-03

申请号：US10032155

申请日：2001-12-20

Applicant: Richard Shann

Inventor： Richard Shann

IPC: G06F9/44

CPC classification number: G06F8/54

Abstract: A method of linking a plurality of object code modules to form an executable program, each object code module having section data, a set of relocation instructions and one or more symbols, each symbol having a plurality of attributes associated therewith, wherein the relocation instructions include a data retrieval instruction having a symbol field identifying a symbol and an attribute field identifying a symbol attribute associated with the identified symbol to be retrieved, the method including reading at least one relocation instruction from the set of relocation instructions and where the relocation instruction is a data retrieval instruction, determining the symbol identified by the symbol field and retrieving one of the plurality of symbol attributes associated with the symbol in dependence on the contents of the symbol attributes field of the instruction.

Abstract translation: 一种链接多个目标代码模块以形成可执行程序的方法，每个目标代码模块具有部分数据，一组重定位指令和一个或多个符号，每个符号具有与之相关联的多个属性，其中重定位指令包括 数据检索指令，其具有标识符号的符号字段和标识与所识别的要检索的符号相关联的符号属性的属性字段，所述方法包括从所述重定位指令集中读取至少一个重定位指令，并且所述重定位指令是 数据检索指令，确定由符号字段识别的符号，并根据指令的符号属性字段的内容检索与符号相关联的多个符号属性中的一个。

公开(公告)号：US07191416B2

公开(公告)日：2007-03-13

申请号：US10352799

申请日：2003-01-27

Applicant: Andrew Hulbert ,  Enrico Gregoratto

Inventor： Andrew Hulbert ,  Enrico Gregoratto

IPC: G06F17/50

CPC classification number: G06F17/5068 ,  G06F17/505

Abstract: A method of arranging an integrated circuit to correct for hold time errors comprises fixing the position of existing cells in a design, determining hold time errors required to be corrected and placing buffer cells in spaces in the existing design. By placing buffer cells in spaces in the existing design, rather than moving cells in the existing design, the hold time can be corrected without changing the critical path.

Abstract translation: 一种布置集成电路以校正保持时间误差的方法包括：将设计中现有单元的位置固定，确定需要校正的保持时间误差，并将缓冲单元放置在现有设计中的空格中。 通过将现有设计中的缓冲区放置在空格中，而不是在现有设计中移动单元格，可以在不改变关键路径的情况下更正保持时间。

公开(公告)号：US07155709B2

公开(公告)日：2006-12-26

申请号：US10103655

申请日：2002-03-20

Applicant: Sean McGoogan ,  Richard Shann

Inventor： Sean McGoogan ,  Richard Shann

IPC: G06F9/44 ,  G06F3/00

CPC classification number: G06F9/45512 ,  G06F9/44521

Abstract: A method of forming an executable program from a plurality of object code modules where each object code module includes a plurality of relocation instructions having at least one information output relocation with a field indicating information to be output. The method includes reading a relocation instruction from one of the object code modules and, when the read relocation instruction is an information output relocation, displaying the information indicated in the field in a human readable form.

Abstract translation: 一种从多个目标代码模块形成可执行程序的方法，其中每个目标代码模块包括具有至少一个信息输出重定位的多个重定位指令，其中字段指示要输出的信息。 该方法包括从目标代码模块之一读取重定位指令，并且当读取的重定位指令是信息输出重定位时，以人类可读的形式显示在该领域中指示的信息。

公开(公告)号：US07143311B2

公开(公告)日：2006-11-28

申请号：US10380995

申请日：2001-09-19

Applicant: Steven Haydock

Inventor： Steven Haydock

IPC: G06F11/00

CPC classification number: G06F11/3636 ,  G06F11/3648

Abstract: A data processor formed on a single integrated circuit and capable of connection to an external memory, the data processor including: a central processing unit; a local memory including a debug memory area; a plurality of interrupt inputs; an interrupt handler coupled to the interrupt inputs for interrupting the central processing unit in response to interrupt signals received on the interrupt inputs, and being arranged to periodically store in the debug memory area of the local memory data indicative of the status of the interrupt handler; the data processor being adapted to, after having been reset, perform a start-up routine including the step of outputting the contents of the debug memory area to the external memory.

Abstract translation: 一种形成在单个集成电路上并且能够连接到外部存储器的数据处理器，所述数据处理器包括：中央处理单元; 包括调试存储器区域的本地存储器; 多个中断输入; 中断处理器，耦合到所述中断输入端，用于响应于在所述中断输入端接收到的中断信号而中断所述中央处理单元，并且被布置为在所述调试存储器区域中周期性地存储指示所述中断处理程序的状态的本地存储器数据; 所述数据处理器在被复位之后，执行包括将所述调试存储器区域的内容输出到所述外部存储器的步骤的启动程序。