Abstract:
In a display device, the anode voltage of an organic light emitting element is periodically reset. The control terminal of a driving transistor is periodically reset, and an input data voltage is connected to the control terminal through an input terminal and an output terminal of the driving transistor. As a result, good control over the displayed luminance is achieved. Other features are also provided.
Abstract:
The organic light emitting display may include a plurality of pixels for generating light components with predetermined brightness components while controlling the amount of current that flows from a first power source to a second power source via organic light emitting diodes (OLED), a first power source controller for extracting data of the highest gray level among input data items of one frame and for outputting a control value having voltage information corresponding to the highest gray level data, and a first power source generator for generating a controlled voltage value corresponding to the control value and outputting the controlled voltage value to the first power source.
Abstract:
The present invention relates to an OLED display and a manufacturing method thereof, including a gate line, a data line intersecting the gate line, a switching thin film transistor connected to the gate line and the data line, a driving thin film transistor connected to the switching thin film transistor, a first driving voltage line connected to the driving thin film transistor and overlapping the gate line and the data line, a first electrode connected to the driving thin film transistor, a second electrode facing the first electrode, and an light emitting member disposed between the first electrode and the second electrode.
Abstract:
An organic light emitting display device includes: a display panel; a timing controller configured to receive image data when a vertical sync signal is activated, to receive reference data corresponding to the image data when the vertical sync signal is deactivated, and to generate an emission control signal in accordance with emission duty information of the reference data; and an emission driver configured to supply first and second emission powers to the display panel, and to control a duration of a period during which a potential difference between the first and second emission powers is greater than or equal to a reference value in accordance with the emission control signal.
Abstract:
A liquid crystal display is provided, which includes a plurality of pixels including first and second thin film transistors, and a pixel electrode connected to the first and second thin film transistors, a first gate line transmitting a first gate signal and connected to the first thin film transistor, a second gate line transmitting a second gate signal and connected to the second thin film transistor, and a data line transmitting a data signal and connected to the first thin film transistor. The second thin film transistor receives a uniform voltage and transmits the uniform voltage to the pixel electrode according to the second gate signal.
Abstract:
An organic light emitting display includes a display unit including pixels coupled to scan lines, first control lines, second control lines, and data lines, a control line driver configured to supply a first control signal and a second control signal to the pixels through the first control lines and the second control lines, a first power source driver for applying a first power to the pixels of the display unit, and a second power source driver for applying a second power to the pixels of the display unit. At least one of the first power or the second power is applied to the pixels of the display unit as voltage values having different levels during one frame. The first and second control signals and the first and second powers are concurrently provided to all of the pixels of the display unit.
Abstract:
A liquid crystal display panel includes n-number of gate lines, (m+1)-number of data lines and (m×n)-number of pixels, wherein the ‘n’ and ‘m’ are natural numbers. The gate lines are extended in a first direction. The data lines are extended in a second direction that is substantially perpendicular to the first direction. The first and last data lines are electrically connected to each other. The pixels are arranged in a matrix shape. M-number of the pixels is arranged along the first direction, and n-number of the pixels is arranged along the second direction. A pixel electrode of the pixels arranged in the second direction are electrically connected to left and right data lines alternately to enhance a display quality and reduce power consumption.
Abstract:
An organic light emitting display device operating in a concurrent (e.g., simultaneous) emission method, which includes a first power driver configured to apply first power, which changes between a first low level and a first high level, to pixels of the display unit, and a second power driver configured to apply second power, which changes between a second low level and a second high level, to the pixels, wherein each of the pixels includes an organic light emitting diode, a driving transistor configured to control an amount of current supplied to the organic light emitting diode, and an initializing transistor coupled to an anode electrode of the organic light emitting diode and configured to be turned on during a reset period in one frame to supply a reset voltage, which is lower than the first high level of the first power, to the anode electrode of the organic light emitting diode.
Abstract:
A pixel electrode and a direction control electrode capacitively coupled to the pixel electrode are provided in a pixel. A pixel thin film transistor is connected to a gate line, a data line, and the pixel electrode. A direction control electrode thin film transistor is connected to a previous gate line, a previous data lines or a next data line, and the direction control electrode. The gate lines are supplied with scanning signals, and each scanning signal includes first and second pulses in a frame. The first pulse of a scanning signal is synchronized with the second pulse of a previous scanning signal.
Abstract:
A liquid crystal display panel includes n-number of gate lines, (m+1)-number of data lines and (m×n)-number of pixels, wherein the ‘n’ and ‘m’ are natural numbers. The gate lines are extended in a first direction. The data lines are extended in a second direction that is substantially perpendicular to the first direction. The first and last data lines are electrically connected to each other. The pixels are arranged in a matrix shape. M-number of the pixels is arranged along the first direction, and n-number of the pixels is arranged along the second direction. A pixel electrode of the pixels arranged in the second direction are electrically connected to left and right data lines alternately to enhance a display quality and reduce power consumption.