公开(公告)号：US20220130776A1

公开(公告)日：2022-04-28

申请号：US17078070

申请日：2020-10-22

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long LU

IPC: H01L23/66 ,  H01L23/00 ,  H01L23/498 ,  H01L21/48 ,  H01Q1/38

Abstract: A semiconductor device package includes an electronic component and a substrate. The electronic component has a first surface and a second surface. The substrate is connected to the first surface of the electronic component through an adhesive layer. The substrate includes a first antenna disposed over the second surface of the electronic components through the adhesive layer.

公开(公告)号：US20210265311A1

公开(公告)日：2021-08-26

申请号：US16796921

申请日：2020-02-20

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long LU ,  Min Lung HUANG

IPC: H01L25/065 ,  H01L23/538 ,  H01L25/00 ,  H01L21/48 ,  H01L23/31

Abstract: A semiconductor device package includes a first substrate and a second substrate arranged above the first substrate. A first connector is disposed on the first substrate, and a first conductor passes through the second substrate and connects to the first connector.

公开(公告)号：US20210210398A1

公开(公告)日：2021-07-08

申请号：US16734023

申请日：2020-01-03

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long LU

IPC: H01L23/31 ,  H01L23/66 ,  H01L23/00 ,  H01L21/56

Abstract: A semiconductor device package includes a substrate, a first electronic component and a first encapsulant. The substrate has a first surface and a second surface opposite to the first surface. The first electronic component is disposed on the first surface of the substrate. The first encapsulant is disposed on the first surface of the substrate and covers the first electronic component. The first encapsulant has a first surface facing away the first surface of the substrate and includes a recess at an edge of the first surface of the first encapsulant.

公开(公告)号：US20210066228A1

公开(公告)日：2021-03-04

申请号：US16557763

申请日：2019-08-30

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long LU

IPC: H01L23/00 ,  H01L21/768 ,  H01L23/48 ,  H01L23/522

Abstract: A package structure includes a base material, at least one electronic device, at least one encapsulant and a plurality of dummy pillars. The electronic device is electrically connected to the base material. The encapsulant covers the electronic device. The dummy pillars are embedded in the encapsulant. At least two of the dummy pillars have different heights.

公开(公告)号：US20210066208A1

公开(公告)日：2021-03-04

申请号：US16555667

申请日：2019-08-29

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long LU

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L25/065 ,  H01L25/00

Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes a first dielectric layer, a first semiconductor element, a second dielectric layer, and at least one first conducive via. The first dielectric layer has a first top surface, a first bottom surface opposite to the first top surface, and a first side surface extending from the first top surface to the first bottom surface. The first semiconductor element is disposed adjacent to the first top surface of the first dielectric layer. The second dielectric layer has a second top surface, a second bottom surface opposite to the second top surface, and a second side surface extending from the second top surface to the second bottom surface, where the second dielectric layer covers a top surface of the first semiconductor element and the first side surface of the first dielectric layer. The first conductive via extends from the first top surface of the first dielectric layer to the second top surface of the second dielectric layer.

公开(公告)号：US20210020533A1

公开(公告)日：2021-01-21

申请号：US16516122

申请日：2019-07-18

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long LU

IPC: H01L23/31 ,  H01L21/56 ,  H01L21/683 ,  H01L21/48 ,  H01L23/00 ,  H01L23/498

Abstract: A semiconductor device package includes an electronic component, an encapsulation layer encapsulating the electronic component, and a passivation layer stacking with the encapsulation layer. The passivation layer has a first surface facing the encapsulation layer, a second surface opposite to the first surface, and a first sidewall connecting the first surface and the second surface. The first sidewall inclines with respect to the second surface, and a first projection width of the encapsulation layer is greater than a second projection width of the passivation layer.

公开(公告)号：US20200227340A1

公开(公告)日：2020-07-16

申请号：US16244991

申请日：2019-01-10

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long LU

IPC: H01L23/42 ,  H01L23/00 ,  H01L23/31 ,  H01L23/522 ,  H01L23/528 ,  H01L21/56

Abstract: A semiconductor trace structure is provided for carrying a heat source. The semiconductor device package includes a dielectric structure having a first surface configured to receive the heat source and a second surface opposite to the first surface; a cavity defined by the dielectric structure to accommodate a fluid. The cavity includes a first passage portion between the first surface and the second surface. A first area of the first passage portion is closer to the heat source than a second area of the first passage portion, and that the first area is greater than the second area from a top view perspective. A method for manufacturing the semiconductor trace structure is also provided.

公开(公告)号：US20190385961A1

公开(公告)日：2019-12-19

申请号：US16007745

申请日：2018-06-13

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long LU

IPC: H01L23/00

Abstract: A semiconductor package device is provided that includes a first circuit layer having a first conductive layer and a first stud bump and a second circuit layer having a second conductive layer and a second stud bump. The first stud bump has a first portion and a second portion, and the second portion of the first stud bump is electrically connected to the second conductive layer. The second stud bump has a first portion and a second portion, and the second portion of the second stud bump is electrically connected to the first conductive layer. The first stud bump partially overlaps the second stud bump in a direction substantially perpendicular to the first circuit layer.

公开(公告)号：US20190229054A1

公开(公告)日：2019-07-25

申请号：US15880377

申请日：2018-01-25

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long LU ,  Jen-Kuang FANG ,  Min Lung HUANG ,  Chan Wen LIU ,  Ching Kuo HSU

IPC: H01L23/522 ,  H01L23/498 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

Abstract: A package device includes a circuit layer, at least one conductive segment, an encapsulant and a redistribution layer. The conductive segment is disposed on the circuit layer and has a first surface and a second surface. The encapsulant encapsulates at least a portion of the conductive segment and has a first upper surface. A first portion of the first surface and at least a portion of the second surface of the conductive segment are disposed above the first upper surface of the encapsulant. The redistribution layer is disposed on the encapsulant, the first portion of the first surface of the conductive segment, and the second surface of the conductive segment.

公开(公告)号：US20190206778A1

公开(公告)日：2019-07-04

申请号：US15858723

申请日：2017-12-29

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long LU

IPC: H01L23/498 ,  H01L25/065 ,  H01L27/12 ,  H01L23/373 ,  H01L21/768 ,  H01L23/48 ,  H01L21/48

CPC classification number: H01L23/49827 ,  H01L21/481 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/3738 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49877 ,  H01L25/0657 ,  H01L27/12 ,  H01L2225/06544

Abstract: An electrical device includes a substrate and a via. The substrate has a first surface and defines a recess in the first surface. The via is disposed in the recess. The via includes an insulation layer, a first conductive layer and a second conductive layer. The insulation layer is disposed on the first surface of the substrate and extends at least to a sidewall of the recess. The first conductive layer is disposed adjacent to the insulation layer and extends over at least a portion of the first surface. The second conductive layer is disposed adjacent to the first conductive layer and extends over at least a portion of the first surface. The second conductive layer has a negative coefficient of thermal expansion (CTE).