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公开(公告)号:US20240306295A1
公开(公告)日:2024-09-12
申请号:US18119268
申请日:2023-03-08
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Wen-Long LU
IPC: H05K1/11 , H01L21/768 , H05K1/02 , H05K3/40
CPC classification number: H05K1/115 , H01L21/76871 , H05K1/024 , H05K3/40 , H05K2201/09145 , H05K2201/09218 , H05K2201/095 , H05K2203/0502
Abstract: A circuit structure includes a low-density conductive structure, a high-density conductive structure and a plurality of traces. The high-density conductive structure is disposed over the low-density conductive structure, and defines an opening extending from a top surface of the high-density conductive structure to a bottom surface of the high-density conductive structure. The opening exposes a first pad of the low-density conductive structure and a second pad of the low-density conductive structure. The second pad is spaced apart from the first pad. The traces extend from the top surface of the high-density conductive structure into the opening. The traces include a first trace connecting to the first pad of the low-density conductive structure and a second trace connecting to the second pad of the low-density conductive structure.
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公开(公告)号:US20230387046A1
公开(公告)日:2023-11-30
申请号:US18231774
申请日:2023-08-08
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Wen-Long LU
IPC: H01L23/66 , H01L21/48 , H01L23/498 , H01Q1/38 , H01L23/00
CPC classification number: H01L23/66 , H01L21/4857 , H01L23/49838 , H01Q1/38 , H01L23/4985 , H01L21/4853 , H01L24/16 , H01L23/49822 , H01L2223/6677 , H01L2224/16227
Abstract: A semiconductor device package includes an electronic component and a substrate. The electronic component has a first surface and a second surface. The substrate is connected to the first surface of the electronic component through an adhesive layer. The substrate includes a first antenna disposed over the second surface of the electronic components through the adhesive layer.
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公开(公告)号:US20210134752A1
公开(公告)日:2021-05-06
申请号:US16673708
申请日:2019-11-04
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Wen-Long LU
IPC: H01L23/00 , H01L23/31 , H01L23/538 , H01L21/683 , H01L21/48 , H01L21/56 , H01L25/10
Abstract: A semiconductor device package includes an electronic component. The electronic component has an active surface, a back surface opposite to the active surface, and a lateral surface connected between the active surface and the back surface. The electronic component has an electrical contact disposed on the active surface. The semiconductor device package also includes a redistribution layer (RDL) contacting the back surface of the electronic component, a first dielectric layer surrounding the electrical contact on the active surface of the electronic component, and a second dielectric layer surrounding the lateral surface of the electronic component and the first dielectric layer. The second dielectric layer has a first sidewall in contact with the lateral surface of the electronic component and a second sidewall opposite to the first sidewall. The second sidewall of the second dielectric layer has a first portion proximal to the RDL and a second portion distal from the RDL. The first portion and the second portion define a stepped feature on the second sidewall. A method of manufacturing a semiconductor device package is also disclosed.
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公开(公告)号:US20210091453A1
公开(公告)日:2021-03-25
申请号:US16578092
申请日:2019-09-20
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Wen-Long LU
Abstract: A semiconductor device package includes a dielectric layer and a stacking conductive structure. The dielectric layer includes a first surface. The stacking conductive structure is disposed on the first surface of the dielectric layer. The stacking conductive structure includes a first conductive layer disposed on the first surface of the dielectric layer, and a second conductive layer stacked on the first conductive layer. A first surface roughness of the first surface of the dielectric layer is larger than a second surface roughness of a top surface of the first conductive layer, and the second surface roughness of the top surface of the first conductive layer is larger than a third surface roughness of a top surface of the second conductive layer.
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公开(公告)号:US20200135675A1
公开(公告)日:2020-04-30
申请号:US16171337
申请日:2018-10-25
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Wen-Long LU
IPC: H01L23/00 , H01L23/532 , H01L21/768
Abstract: A semiconductor package device includes a first conductive structure, a second conductive structure and a dielectric layer. The first conductive structure has a tapered portion. The second conductive structure surrounds the tapered portion of the first conductive structure and is in direct contact with a side wall of the tapered portion of the first conductive structure. The dielectric layer surrounds the tapered portion of the first conductive structure and is in direct contact with the side wall of the tapered portion of the first conductive structure.
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公开(公告)号:US20190311979A1
公开(公告)日:2019-10-10
申请号:US15945426
申请日:2018-04-04
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Wen-Long LU
IPC: H01L23/498 , H01L23/00 , H01L23/31 , H01L21/48
Abstract: A semiconductor substrate includes a first dielectric structure and a first circuit layer. The first circuit layer is embedded in the first dielectric structure. The first circuit layer does not protrude from a first surface of the first dielectric structure. The first circuit layer includes at least one conductive segment. The conductive segment includes a first portion adjacent to the first surface of the first dielectric structure and a second portion opposite to the first portion. A width of the first portion of the conductive segment is different from a width of the second portion of the conductive segment.
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公开(公告)号:US20190304862A1
公开(公告)日:2019-10-03
申请号:US15943334
申请日:2018-04-02
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Wen-Long LU
IPC: H01L23/31 , H01L21/56 , H01L23/538
Abstract: A semiconductor package includes a dielectric layer and a conductive post. The dielectric layer has a first surface and a second surface opposite to the first surface. The conductive post is disposed in the dielectric layer. The conductive post includes a first portion and a second portion disposed above the first portion. The second portion of the conductive post is recessed from the second surface of the dielectric layer.
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公开(公告)号:US20190157197A1
公开(公告)日:2019-05-23
申请号:US15821599
申请日:2017-11-22
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Jen-Kuang FANG , Wen-Long LU
IPC: H01L23/498 , H01L23/00 , H01L23/31
Abstract: A semiconductor device package includes an electronic component, a first substrate, a first bonding wire and a second substrate. The electronic component has a first surface. The first substrate is disposed on the first surface of the electronic component. The first bonding wire electrically connects the first substrate to the electronic component. The second substrate is disposed on the first surface of the electronic component. The second substrate defines an opening accommodating the first substrate and the first bonding wire.
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公开(公告)号:US20190148325A1
公开(公告)日:2019-05-16
申请号:US15809674
申请日:2017-11-10
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Wen-Long LU , Chi-Chang LEE
IPC: H01L23/00 , H01L21/683
Abstract: An electronic device includes a dielectric layer, a redistribution layer, a conductive structure, an insulating layer and a solder bump. The dielectric layer has a first surface and a second surface opposite to the first surface, and defines a through hole extending between the first surface and the second surface. The redistribution layer is disposed on the first surface of the dielectric layer and in the through hole. The conductive structure is disposed on the redistribution layer. The conductive structure includes an upper portion and a lower portion. The lower portion is disposed on the redistribution layer, and the upper portion is disposed on the lower portion. The insulating layer covers a portion of the redistribution layer and surrounds a first portion of the lower portion of the conductive structure. The solder bump covers a portion of the conductive structure.
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公开(公告)号:US20190139846A1
公开(公告)日:2019-05-09
申请号:US15803387
申请日:2017-11-03
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Wen-Long LU
IPC: H01L23/31 , H01L21/56 , H01L23/498 , H01L23/538 , H01L23/522 , H01L25/18 , H01L21/48
Abstract: At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package comprises a carrier, a first patterned conductive layer, an interconnection structure, a first semiconductor device, an encapsulant, a second patterned conductive layer, and a passivation layer. The carrier has a first surface and a second surface opposite to the first surface. The first patterned conductive layer is adjacent to the first surface of the carrier. The interconnection structure is disposed on the first patterned conductive layer and electrically connected to the first patterned conductive layer. The first semiconductor device is disposed on the interconnection structure and electrically connected to the interconnection structure. The encapsulant is disposed on the first patterned conductive layer and encapsulates the semiconductor device and the interconnection structure. The second patterned conductive layer is disposed on a top surface and a side surface of the encapsulant and electrically connected to the first patterned conductive layer. The passivation layer is disposed on the second patterned conductive layer and covers the side surface of the encapsulant.
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