公开(公告)号：US20220028756A1

公开(公告)日：2022-01-27

申请号：US16934559

申请日：2020-07-21

Applicant: QUALCOMM Incorporated

Inventor： Aniket PATIL ,  Jonghae KIM ,  Hong Bok WE

IPC: H01L23/48 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56

Abstract: An integrated circuit (IC) package is described. The IC package includes a die. The die including an active layer on a substrate and through substrate vias (TSVs) coupled to the active layer and extending through the substrate to a backside surface of the die. The IC package also includes integrated passive devices (IPDs) on the backside surface of the die and coupled to the active layer through the TSVs. The IC package further includes back-end-of-line (BEOL) layers on the active layer. The IC package also includes a metallization structure on the BEOL layers. The IC package also includes an under bump metallization layer on the metallization structure. The IC package further includes package bumps on the first under bump metallization layer.

公开(公告)号：US20210391247A1

公开(公告)日：2021-12-16

申请号：US16900672

申请日：2020-06-12

Applicant: QUALCOMM Incorporated

Inventor： Aniket PATIL ,  Hong Bok WE ,  Kuiwon KANG

IPC: H01L23/528 ,  H01L21/768

Abstract: A substrate that includes a core layer comprising a first surface and a second surface, a plurality of core interconnects located in the core layer, a high-density interconnect portion located in the core layer, a first dielectric layer coupled to the first surface of the core layer, a first plurality of interconnects located in the first dielectric layer, a second dielectric layer coupled to the second surface of the core layer, and a second plurality of interconnects located in the second dielectric layer. The high-density interconnect portion includes a first redistribution dielectric layer and a first plurality of high-density interconnects located in the first redistribution dielectric layer. The high-density interconnect portion may provide high-density interconnects.

公开(公告)号：US20210358839A1

公开(公告)日：2021-11-18

申请号：US16875579

申请日：2020-05-15

Applicant: QUALCOMM Incorporated

Inventor： Aniket PATIL ,  Hong Bok WE ,  Jonghae KIM

IPC: H01L23/528 ,  H01L23/498 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

Abstract: An integrated circuit (IC) package is described. The IC package includes back-end-of-line layers on a substrate. The IC package also includes a nested interconnect structure on the back-end-of-line layers on the substrate. The nested interconnect structure is composed of an inner core pad and an outer ring pad in a concentric arrangement. The IC package further includes a redistribution layer on the nested interconnect structure. The IC package also includes an under bump metallization layer on the redistribution layer to support package balls.

公开(公告)号：US20210104467A1

公开(公告)日：2021-04-08

申请号：US16590718

申请日：2019-10-02

Applicant: QUALCOMM Incorporated

Inventor： Aniket PATIL ,  Brigham NAVAJA ,  Hong Bok WE ,  Yuzhe ZHANG

IPC: H01L23/538 ,  H01L23/495 ,  H01L23/31

Abstract: A package that includes a second redistribution portion, a die coupled to the second redistribution portion, an encapsulation layer encapsulating the die, and a first redistribution portion coupled to the second redistribution portion. The first redistribution portion is located laterally to the die. The first redistribution portion is located over the second redistribution portion. The first redistribution portion and the second redistribution portion are configured to provide one or more electrical paths for the die.