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公开(公告)号:US20230397437A1
公开(公告)日:2023-12-07
申请号:US18249415
申请日:2021-10-08
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Shunpei YAMAZAKI , Takayuki IKEDA , Hitoshi KUNITAKE , Tatsuya ONUKI
IPC: H10B53/30
CPC classification number: H10B53/30
Abstract: A semiconductor device that has a novel structure and includes a memory cell including a ferroelectric capacitor includes a first transistor (500A), a second transistor (500B), a first capacitor (600A), a second capacitor (600B), and a wiring (401). The first transistor is electrically connected to the first capacitor. The second transistor is electrically connected to the second capacitor. The wiring is positioned below the first transistor and the second transistor and is electrically connected to the first transistor or the second transistor. The first capacitor and the second capacitor each include a ferroelectric layer (630). The first capacitor and the second capacitor are placed on the same plane. The first capacitor and the second capacitor may include a region where they overlap with each other. Each of the first transistor and the second transistor preferably includes an oxide semiconductor in a channel. The ferroelectric layer preferably includes one or more selected from hafnium, zirconium, and Group III to IV elements.
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公开(公告)号:US20230298650A1
公开(公告)日:2023-09-21
申请号:US18006323
申请日:2021-07-20
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Shunpei YAMAZAKI , Hajime KIMURA , Hitoshi KUNITAKE
CPC classification number: G11C11/221 , H10B53/30 , H10B51/30
Abstract: Provided is a semiconductor device capable of retaining data for a long time. The semiconductor device includes a cell provided with a capacitor, a first transistor, and a second transistor; the capacitor includes a first electrode, a second electrode, and a ferroelectric layer; the ferroelectric layer is provided between the first electrode and the second electrode and polarization reversal occurs by application of a first saturated polarization voltage or a second saturated polarization voltage whose polarity is different from that of the first saturated polarization voltage; and the first electrode, one of a source and a drain of the first transistor, and a gate of the second transistor are electrically connected to one another. In a first period, the first saturated polarization voltage is applied to the ferroelectric layer. In a second period, a voltage having a value between the first saturated polarization voltage and the second saturated polarization voltage is applied to the ferroelectric layer as a data voltage.
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公开(公告)号:US20230067352A1
公开(公告)日:2023-03-02
申请号:US17797233
申请日:2021-03-01
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Kazuaki OHSHIMA , Hitoshi KUNITAKE
IPC: H01L25/065 , H01L23/538 , H01L27/12 , H01L29/786 , H03K19/094
Abstract: A semiconductor device being capable of high-speed data transmission and having a reduced circuit area is provided. The semiconductor device includes a semiconductor chip, an external terminal, and a layer including two facing surfaces. The semiconductor chip is provided on one surface side of the layer, and the external terminal is provided on the other surface side of the layer at least in a region not overlapping with the semiconductor chip. The semiconductor chip includes a first circuit including a first transistor, and the layer includes a second circuit including a second transistor. The first circuit is electrically connected to the second circuit, and the second circuit is electrically connected to the external terminal. The second transistor includes a metal oxide in a channel formation region. Note that the second circuit may be a CML circuit. In addition, an insulator may be provided above the one surface of the layer and on a side surface of the semiconductor chip.
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公开(公告)号:US20230065351A1
公开(公告)日:2023-03-02
申请号:US17776696
申请日:2020-11-10
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Hiromichi GODO , Hitoshi KUNITAKE , Kazuki TSUDA
IPC: H01L27/11582
Abstract: A novel semiconductor device is provided. A memory string extends in a Z direction. The memory string achieves high-speed operation by using an oxide semiconductor for a semiconductor layer. The memory string includes a MONOS memory cell. A tunnel layer is provided on a control gate side, and a block layer is provided on a semiconductor side. During erase operation, a hole is injected into a charge accumulation layer from the control gate side.
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公开(公告)号:US20230044659A1
公开(公告)日:2023-02-09
申请号:US17790517
申请日:2021-01-06
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiromichi GODO , Hitoshi KUNITAKE , Kazuki TSUDA
IPC: H01L27/11582 , G11C16/04 , G11C16/08 , H01L27/11556
Abstract: A novel semiconductor device is provided. A memory string, which extends in the Z direction and includes a conductor and an oxide semiconductor, intersects with a plurality of wirings CG extending in the Y direction. The conductor is placed along a center axis of the memory string, and the oxide semiconductor is concentrically placed outside the conductor. The conductor is electrically connected to the oxide semiconductor. An intersection portion of the memory string and the wiring CG functions as a transistor. In addition, the intersection portion functions as a memory cell.
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公开(公告)号:US20220399355A1
公开(公告)日:2022-12-15
申请号:US17776342
申请日:2020-11-24
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Kazuki TSUDA , Hiromichi GODO , Satoru OHSHITA , Hitoshi KUNITAKE
IPC: H01L27/11524 , H01L27/11519 , H01L27/11556 , H01L27/11565 , H01L27/1157 , H01L27/11582
Abstract: A novel semiconductor device is provided. A structure body extending in a first direction, a first conductor extending in a second direction, and a second conductor extending in the second direction are provided. In a first intersection portion where the structure body and the first conductor intersect with each other, a first insulator, a first semiconductor, a second insulator, a second semiconductor, a third insulator, a fourth insulator, and a fifth insulator are provided concentrically around a third conductor. In a second intersection portion where the structure body and the second conductor intersect with each other, the first insulator, the first semiconductor, the second insulator, a fourth conductor, the second semiconductor, and the third insulator are provided concentrically around the third conductor.
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公开(公告)号:US20220310148A1
公开(公告)日:2022-09-29
申请号:US17615867
申请日:2020-06-30
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Takayuki IKEDA , Hitoshi KUNITAKE
IPC: G11C11/405 , H03K3/012 , H01L27/108 , H01L27/12 , H01L29/786
Abstract: To provide a semiconductor device with a novel structure. The semiconductor device includes a plurality of constant current circuits each given a digital signal. The constant current circuits each include a first transistor to a third transistor. The first transistor has a function of making a first current corresponding to set analog potential flow therethrough. The second transistor has a function of controlling the first current flowing between a source and a drain of the first transistor, in response to the digital signal. The third transistor has a function of holding the analog potential supplied to a gate of the first transistor, by being turned off. The first transistor to the third transistor each include a semiconductor layer including an oxide semiconductor in a channel formation region.
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公开(公告)号:US20220278139A1
公开(公告)日:2022-09-01
申请号:US17626307
申请日:2020-07-10
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Takayuki IKEDA , Hitoshi KUNITAKE , Koji KUSUNOKI , Yoshiaki OIKAWA , Shunpei YAMAZAKI
Abstract: A display device with a novel structure is provided. The display device includes a first substrate provided with a plurality of pixels including a display element, and a second substrate including a first conductive layer provided with a plurality of first openings. The first conductive layer has a function of an antenna capable of transmitting and receiving a radio signal. The pixel and the first opening include a region where the pixel and the first opening overlap with each other. The second substrate includes an element layer. The element layer includes a transistor. The transistor has a function of an amplifier capable of amplifying the radio signal. The transistor each includes a semiconductor layer including a metal oxide in a channel formation region. The metal oxide contains In, Ga, and Zn.
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公开(公告)号:US20220216830A1
公开(公告)日:2022-07-07
申请号:US17606825
申请日:2020-05-20
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Kazuaki OHSHIMA , Hitoshi KUNITAKE , Tatsunori INOUE
IPC: H03D7/14 , H01L29/786 , H01L27/06 , H04B1/16
Abstract: To provide a mixer and a semiconductor device which each have a small circuit area and each of which operation capability is inhibited from being decreased due to heat. The mixer includes a differential portion, a current source, a first load, an input terminal, and a first output terminal; the differential portion includes a first and a second transistor; and each of the first and the second transistors includes a metal oxide in a channel formation region. A first terminal of each of the first and the second transistors is electrically connected to the input terminal and a current source and a second terminal of the first transistor is electrically connected to a first terminal of the first load and the first output terminal. The first load has a function of supplying a current between the first terminal and a second terminal of the first load by application of voltage to the second terminal of the first load, and the current source has a function of supplying a constant current to the current source from the first terminal of each of the first and the second transistors. The current source includes a transistor including silicon in a channel formation region, and the differential portion is positioned above the current source.
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公开(公告)号:US20210135010A1
公开(公告)日:2021-05-06
申请号:US17011385
申请日:2020-09-03
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Shunpei YAMAZAKI , Hajime KIMURA , Hitoshi KUNITAKE
IPC: H01L29/786 , H01L27/108
Abstract: A novel semiconductor device is provided. A component extending in a first direction, and a first conductor and a second conductor extending in a second direction are provided. The component includes a third conductor, a first insulator, a first semiconductor, and a second insulator. In a first intersection portion of the component and the first conductor, the first insulator, the first semiconductor, the second insulator, a second semiconductor, and a third insulator are provided concentrically. In a second intersection portion of the component and the second conductor, the first insulator, the first semiconductor, the second insulator, a fourth conductor, and a fourth insulator are provided concentrically around the third conductor.
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