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公开(公告)号：US20250169060A1
公开(公告)日：2025-05-22
申请号：US18837718
申请日：2023-02-03
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Shunpei YAMAZAKI , Tatsuya ONUKI , Hitoshi KUNITAKE
Abstract: A memory device that can be scaled down or highly integrated is provided. The memory device includes a first transistor, a second transistor, a third transistor, a first capacitor, and a second capacitor. The first capacitor includes a first electrode and a second electrode. The second capacitor includes the first electrode and a third electrode. One of a source and a drain of the first transistor is electrically connected to the second electrode. One of a source and a drain of the second transistor is electrically connected to the third electrode. A gate of the third transistor is electrically connected to the second electrode. The first electrode includes a portion overlapping with each of the second electrode, the third electrode, the first transistor, and the second transistor, and is supplied with a fixed potential or a ground potential.
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公开(公告)号：US20250159900A1
公开(公告)日：2025-05-15
申请号：US18839097
申请日：2023-02-13
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Hitoshi KUNITAKE , Fumito ISAKA , Tatsuya ONUKI , Shunpei YAMAZAKI
Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first transistor that includes a first conductor, a first insulator, a first metal oxide, a second insulator, a second conductor, and a third conductor and a fourth conductor which cover parts of a top surface and parts of a side surface of the first metal oxide, which are stacked in this order from the bottom. A second transistor includes a fifth conductor, the first insulator, a second metal oxide, a third insulator, a sixth conductor, and a seventh conductor and a eighth conductor which cover parts of a top surface and parts of a side surface of the second metal oxide, which are stacked in this order from the bottom. A third transistor includes a ninth conductor, the first insulator, the second metal oxide, a fourth insulator, a tenth conductor, an eighth conductor, and an eleventh conductor covering part of the top surface and part of the side surface of the second metal oxide, which are stacked in this order from the bottom. One electrode of a capacitor including a material that can have ferroelectricity is electrically connected to the third conductor and the sixth conductor.
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公开(公告)号：US20250157519A1
公开(公告)日：2025-05-15
申请号：US19019968
申请日：2025-01-14
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Shunpei YAMAZAKI , Hajime KIMURA , Hitoshi KUNITAKE
Abstract: Provided is a semiconductor device capable of retaining data for a long time. The semiconductor device includes a cell provided with a capacitor, a first transistor, and a second transistor; the capacitor includes a first electrode, a second electrode, and a ferroelectric layer; the ferroelectric layer is provided between the first electrode and the second electrode and polarization reversal occurs by application of a first saturated polarization voltage or a second saturated polarization voltage whose polarity is different from that of the first saturated polarization voltage; and the first electrode, one of a source and a drain of the first transistor, and a gate of the second transistor are electrically connected to one another. In a first period, the first saturated polarization voltage is applied to the ferroelectric layer. In a second period, a voltage having a value between the first saturated polarization voltage and the second saturated polarization voltage is applied to the ferroelectric layer as a data voltage.
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公开(公告)号：US20250015195A1
公开(公告)日：2025-01-09
申请号：US18763192
申请日：2024-07-03
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Shunpei YAMAZAKI , Fumito ISAKA , Yuichi SATO , Toshikazu OHNO , Hitoshi KUNITAKE , Tsutomu MURAKAWA
IPC: H01L29/786 , H01L29/66
Abstract: A semiconductor device including an oxide semiconductor layer which is formed over a substrate and includes indium is provided. The oxide semiconductor layer is formed in parallel or substantially in parallel with a surface of the substrate. The oxide semiconductor layer includes a first region, a second region over the first region, and a third region over the second region. The first region is located in a range from a formation surface of the oxide semiconductor layer to greater than or equal to 0 nm to less than or equal to 3 nm in a direction substantially perpendicular to the formation surface. In cross-sectional observation of the oxide semiconductor layer using a transmission electron microscope, bright spots arranged in a layered manner in a direction parallel to the formation surface are observed in each of the first region, the second region, and the third region.
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公开(公告)号：US20250008739A1
公开(公告)日：2025-01-02
申请号：US18707987
申请日：2022-11-04
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Haruyuki BABA , Hitoshi KUNITAKE
IPC: H10B51/30
Abstract: A memory element with a novel structure is provided. The memory element includes a stack of a first electrode, a first insulating layer, a semiconductor layer, a second insulating layer, and a second electrode. The first electrode, the first insulating layer, the semiconductor layer, the second insulating layer, and the second electrode include a region where they overlap with each other. An oxide semiconductor, which is a kind of a metal oxide, is used for the semiconductor layer. For the first insulating layer, a material having anti-ferroelectricity is used.
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Patent Agency Ranking
公开(公告)号：US20230363174A1
公开(公告)日：2023-11-09
申请号：US18245757
申请日：2021-09-09
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Shunpei YAMAZAKI , Yasuhiro JINBO , Hitoshi KUNITAKE , Kazuaki OHSHIMA , Masashi OOTA , Kazuma FURUTANI , Takeshi AOKI
IPC: H10B51/30 , H10B53/30 , H01L29/786 , H01L29/417 , H01L29/78
CPC classification number: H10B51/30 , H10B53/30 , H01L29/7869 , H01L29/41733 , H01L29/78696 , H01L29/78391
Abstract: A ferroelectric device including a metal oxide film having favorable ferroelectricity is provided. The ferroelectric device includes a first conductor, a metal oxide film over the first conductor, and a second conductor over the metal oxide film. The metal oxide film has ferroelectricity. The metal oxide film has a crystal structure. The crystal structure includes a first layer and a second layer. The first layer contains first oxygen and hafnium. The second layer contains second oxygen and zirconium. The hafnium and the zirconium are bonded to each other through the first oxygen. The second oxygen is bonded to the zirconium.
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公开(公告)号：US20230335173A1
公开(公告)日：2023-10-19
申请号：US18025457
申请日：2021-09-08
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Shunpei YAMAZAKI , Hajime KIMURA , Hitoshi KUNITAKE
IPC: G11C11/22
CPC classification number: G11C11/221 , G11C11/2293 , G11C11/2273 , G11C11/2275
Abstract: A semiconductor device with low power consumption that is capable of non-destructive reading is provided. The semiconductor device includes a first transistor, a second transistor, a third transistor, a first FTJ element, and a second FTJ element. A first terminal of the first transistor is electrically connected to an output terminal of the first FTJ element, an input terminal of the second FTJ element, and a gate of the second transistor. A first terminal of the second transistor is electrically connected to a second terminal of the third transistor. For data writing, polarization is caused in each of the first FTJ element and the second FTJ element in accordance with data. For data reading, a voltage that does not cause a change in polarization is applied between the input terminal of the first FTJ element and the output terminal of the second FTJ element, a potential is supplied to the gate of the second transistor, and a current or voltage corresponding to data is obtained from the first terminal of the second transistor.
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公开(公告)号：US20230320100A1
公开(公告)日：2023-10-05
申请号：US18024823
申请日：2021-09-16
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Shunpei YAMAZAKI , Takayuki IKEDA , Tatsuya ONUKI , Hitoshi KUNITAKE , Yasuhiro JINBO
Abstract: A memory device having large memory capacity is provided. A highly reliable memory device is provided. A semiconductor device includes a first conductive layer extending in a first direction, a structure body extending in a second direction intersecting with the first direction, a first insulating layer, and a second insulating layer. The structure body includes a functional layer, a semiconductor layer, a third insulating layer, and a second conductive layer. In an intersection portion of the first conductive layer and the structure body, the third insulating layer, the semiconductor layer, and the functional layer are placed concentrically around the second conductive layer in this order. The first insulating layer and the second insulating layer are stacked in the second direction. The functional layer and the first conductive layer are placed between the first insulating layer and the second insulating layer. The second conductive layer, the third insulating layer, and the semiconductor layer include a portion positioned inside a first opening provided in the first insulating layer and a portion positioned inside a second opening provided in the second insulating layer.
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公开(公告)号：US20230259681A1
公开(公告)日：2023-08-17
申请号：US18025213
申请日：2021-09-09
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Hitoshi KUNITAKE , Haruyuki BABA
IPC: G06F30/367 , G06F30/3323 , G06F30/3308
CPC classification number: G06F30/367 , G06F30/3323 , G06F30/3308
Abstract: A program for executing a simulation of a circuit including an anti-ferroelectric element is provided. An equivalent circuit model of an anti-ferroelectric element is set in the program. The equivalent circuit model includes, between a first terminal and a second terminal, a ferroelectric element, a linear resistor, a first transistor, and a second transistor. The first terminal is electrically connected to one of a pair of electrodes of the ferroelectric element and a first terminal of the linear resistor; the other of the pair of electrodes of the ferroelectric element is electrically connected to one of a source electrode and a drain electrode of the first transistor; a gate electrode of the first transistor is electrically connected to a gate electrode of the second transistor, one of a source electrode and a drain electrode of the second transistor, and a second terminal of the linear resistor; and the second terminal is electrically connected to the other of the source electrode and the drain electrode of the first transistor and the other of the source electrode and the drain electrode of the second transistor.
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公开(公告)号：US20230040508A1
公开(公告)日：2023-02-09
申请号：US17788050
申请日：2020-12-14
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Tatsuya ONUKI , Munehiro KOZUMA , Takeshi AOKI , Takanori MATSUZAKI , Yuki OKAMOTO , Masashi OOTA , Shuhei NAGATSUKA , Hitoshi KUNITAKE , Shunpei YAMAZAKI
IPC: H01L29/786 , G06N3/02 , H01L29/423 , H01L27/105
Abstract: To provide a semiconductor device with a novel structure. The semiconductor device includes an accelerator. The accelerator includes a first memory circuit, a second memory circuit, and an arithmetic circuit. The first memory circuit includes a first transistor. The second memory circuit includes a second transistor. Each of the first transistor and the second transistor includes a semiconductor layer including a metal oxide in a channel formation region. The arithmetic circuit includes a third transistor. The third transistor includes a semiconductor layer including silicon in a channel formation region. The first transistor and the second transistor are provided in different layers. The layer including the first transistor is provided over a layer including the third transistor. The layer including the second transistor is provided over the layer including the first transistor. The data retention characteristics of the first memory circuit are different from those of the second memory circuit.
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