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公开(公告)号：US11716095B2
公开(公告)日：2023-08-01
申请号：US17465841
申请日：2021-09-02
Applicant: Samsung Electronics Co., Ltd.
Inventor： Ilia Ovsiannikov
CPC classification number: H03M7/3066 , G06F9/30018 , G06F9/30036 , G06F9/30145 , G06F9/3818 , G06F9/3851 , H03M7/40 , H03M7/6005 , H03M7/6011 , H03M7/6023 , H04L5/023
Abstract: A data compressor a zero-value remover, a zero bit mask generator, a non-zero values packer, and a row-pointer generator. The zero-value remover receives 2N bit streams of values and outputs 2N non-zero-value bit streams having zero values removed from each respective bit stream. The zero bit mask generator receives the 2N bit streams of values and generates a zero bit mask for a predetermined number of values of each bit stream in which each zero bit mask indicates a location of a zero value in the predetermined number of values corresponding to the zero bit mask. The non-zero values packer receives the 2N non-zero-value bit streams and forms a group of packed non-zero values. The row-pointer generator that generates a row-pointer for each group of packed non-zero values.
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公开(公告)号：US11664819B2
公开(公告)日：2023-05-30
申请号：US16847642
申请日：2020-04-13
Applicant: Samsung Electronics Co., Ltd.
Inventor： Ilia Ovsiannikov , Lei Wang
CPC classification number: H03M7/3066 , G06F9/30018 , G06F9/30036 , G06F9/30145 , G06F9/3818 , G06F9/3851 , H03M7/40 , H03M7/6005 , H03M7/6011 , H03M7/6023 , H04L5/023
Abstract: A data-sparsity homogenizer includes a plurality of multiplexers and a controller. The plurality of multiplexers receives 2N bit streams of non-homogenous sparse data in which the non-homogenous sparse data includes non-zero value data clumped together. The plurality of multiplexers is arranged in 2N rows and N columns. Each input of a multiplexer in a first column receives a respective bit stream of the 2N bit streams of non-homogenized sparse data, and the multiplexers in a last column output 2N bit streams of sparse data that is more homogenous than the non-homogenous sparse data of the 2N bit streams. The controller controls the plurality of multiplexers so that the multiplexers in the last column output the 2N channels of bit streams of sparse data that is more homogeneous than the non-homogenous sparse data of the 2N bit streams.
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公开(公告)号：US11645224B2
公开(公告)日：2023-05-09
申请号：US17751487
申请日：2022-05-23
Applicant: Samsung Electronics Co., Ltd.
Inventor： Ilia Ovsiannikov , Yibing Michelle Wang
IPC: G06F15/173 , G06F17/16 , G06F7/533 , G06F7/544 , G06F13/16 , G06N3/08 , G06F7/57 , G06F9/38 , G06F17/15
CPC classification number: G06F15/17343 , G06F7/5332 , G06F7/5443 , G06F7/57 , G06F9/3889 , G06F9/3897 , G06F13/1673 , G06F17/15 , G06F17/16 , G06N3/08
Abstract: A system for calculating. A scratch memory is connected to a plurality of configurable processing elements by a communication fabric including a plurality of configurable nodes. The scratch memory sends out a plurality of streams of data words. Each data word is either a configuration word used to set the configuration of a node or of a processing element, or a data word carrying an operand or a result of a calculation. Each processing element performs operations according to its current configuration and returns the results to the communication fabric, which conveys them back to the scratch memory.
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公开(公告)号：US11620491B2
公开(公告)日：2023-04-04
申请号：US16842700
申请日：2020-04-07
Applicant: Samsung Electronics Co., Ltd.
Inventor： Lei Wang , Ilia Ovsiannikov
Abstract: A processor includes a register, a non-zero weight value selector and a multiplier. The register holds a first group of weight values and a second group of weight values. Each group of weight values includes at least one weight value, and each weight value in the first group of weight values corresponding to a weight value in the second group of weight values. The non-zero weight value selector selects a non-zero weight value from a weight value in the first group of weight values or a non-zero weight value in the second group of weight values that corresponds to the weight value in the first group of weight values. The multiplier multiplies the selected non-zero weight value and an activation value that corresponds to the selected non-zero weight value to form an output product value.
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公开(公告)号：US11593586B2
公开(公告)日：2023-02-28
申请号：US16553158
申请日：2019-08-27
Applicant: Samsung Electronics Co., Ltd.
Inventor： Zhengping Ji , Ilia Ovsiannikov , Yibing Michelle Wang , Lilong Shi
Abstract: A client device configured with a neural network includes a processor, a memory, a user interface, a communications interface, a power supply and an input device, wherein the memory includes a trained neural network received from a server system that has trained and configured the neural network for the client device. A server system and a method of training a neural network are disclosed.
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Patent Agency Ranking
公开(公告)号：US11551055B2
公开(公告)日：2023-01-10
申请号：US16842700
申请日：2020-04-07
Applicant: Samsung Electronics Co., Ltd.
Inventor： Lei Wang , Ilia Ovsiannikov
Abstract: A processor includes a register, a non-zero weight value selector and a multiplier. The register holds a first group of weight values and a second group of weight values. Each group of weight values includes at least one weight value, and each weight value in the first group of weight values corresponding to a weight value in the second group of weight values. The non-zero weight value selector selects a non-zero weight value from a weight value in the first group of weight values or a non-zero weight value in the second group of weight values that corresponds to the weight value in the first group of weight values. The multiplier multiplies the selected non-zero weight value and an activation value that corresponds to the selected non-zero weight value to form an output product value.
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公开(公告)号：US11152952B2
公开(公告)日：2021-10-19
申请号：US16847645
申请日：2020-04-13
Applicant: Samsung Electronics Co., Ltd.
Inventor： Ilia Ovsiannikov
Abstract: A data compressor includes a zero-value remover, a zero bit mask generator, a plurality of multiplexers, and a row-pointer generator. The zero-value remover receives 2N bit streams of values and outputs 2N non-zero-value bit streams having zero values removed. The zero bit mask generator generates a zero bit mask for a predetermined number of values of each bit stream that indicates a location of a zero value in the predetermined number of values corresponding to the zero bit mask. Each input of a multiplexer in a first column of the multiplexers receives a respective bit stream of the 2N bit streams of non-zero values. The multiplexers in a last column outputting 2N bit streams of values as packed non-zero values in which each output bit stream has a same bit-stream length. The row-pointer generator generates a row-pointer for each respective non-zero-value bit stream in a group of packed non-zero values.
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公开(公告)号：US11146283B2
公开(公告)日：2021-10-12
申请号：US16847631
申请日：2020-04-13
Applicant: Samsung Electronics Co., Ltd.
Inventor： Ilia Ovsiannikov
Abstract: A data compressor a zero-value remover, a zero bit mask generator, a non-zero values packer, and a row-pointer generator. The zero-value remover receives 2N bit streams of values and outputs 2N non-zero-value bit streams having zero values removed from each respective bit stream. The zero bit mask generator receives the 2N bit streams of values and generates a zero bit mask for a predetermined number of values of each bit stream in which each zero bit mask indicates a location of a zero value in the predetermined number of values corresponding to the zero bit mask. The non-zero values packer receives the 2N non-zero-value bit streams and forms a group of packed non-zero values. The row-pointer generator that generates a row-pointer for each group of packed non-zero values.
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公开(公告)号：US10832135B2
公开(公告)日：2020-11-10
申请号：US15488430
申请日：2017-04-14
Applicant: Samsung Electronics Co., Ltd.
Inventor： Zhengping Ji , John Wakefield Brothers , Ilia Ovsiannikov , Eunsoo Shim
Abstract: An embodiment includes a method, comprising: pruning a layer of a neural network having multiple layers using a threshold; and repeating the pruning of the layer of the neural network using a different threshold until a pruning error of the pruned layer reaches a pruning error allowance.
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公开(公告)号：US10557925B2
公开(公告)日：2020-02-11
申请号：US15340972
申请日：2016-11-01
Applicant: Samsung Electronics Co., Ltd.
Inventor： Yibing Michelle Wang , Tae-Yon Lee , Ilia Ovsiannikov
Abstract: The Time-of-Flight (TOF) technique is combined with analog amplitude modulation within each pixel in an image sensor. The pixel may be a two-tap pixel or a one-tap pixel. Two photoelectron receiver circuits in the pixel receive respective analog modulating signals. The distribution of the received photoelectron charge between these two circuits is controlled by the difference (or ratio) of the two analog modulating voltages. The differential signals generated in this manner within the pixel are modulated in time domain for TOF measurement. Thus, the TOF information is added to the received light signal by the analog domain-based single-ended to differential converter inside the pixel itself. The TOF-based measurement of range and its resolution are controllable by changing the duration of modulation. An autonomous navigation system with these features may provide improved vision for drivers under difficult driving conditions like low light, fog, bad weather, or strong ambient light.
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