公开(公告)号：US06281552B1

公开(公告)日：2001-08-28

申请号：US09532690

申请日：2000-03-22

申请人： Ritsuko Kawasaki ,  Hidehito Kitakado ,  Kenji Kasahara ,  Shunpei Yamazaki

发明人： Ritsuko Kawasaki ,  Hidehito Kitakado ,  Kenji Kasahara ,  Shunpei Yamazaki

IPC分类号： H01L2904

CPC分类号： H01L27/1214 ,  G02F1/13454 ,  H01L27/3244 ,  H01L29/66765 ,  H01L29/78621 ,  H01L29/78627 ,  H01L29/78633 ,  H01L29/78636 ,  H01L29/78645

摘要： To improve the operation characteristic and reliability of a semiconductor device by optimizing the structure of bottom gate type or inverted stagger type TFTs arranged in circuits of the semiconductor device in accordance with the function of the respective circuits. At least LDD regions that overlap with a gate electrode are formed in an N channel type TFT of a driving circuit, and LDD regions that do not overlap with the gate electrode are formed in an N channel type TFT of a pixel matrix circuit. The concentration of the two kinds of LDD regions is differently set from each other, to thereby obtain the optimal circuit operation.

摘要翻译： 通过根据各个电路的功能优化设置在半导体器件的电路中的底栅型或倒置交错型TFT的结构来提高半导体器件的操作特性和可靠性。 至少与栅电极重叠的LDD区域形成在驱动电路的N沟道型TFT中，并且在像素矩阵电路的N沟道型TFT中形成与栅电极不重叠的LDD区域。 两种LDD区域的浓度彼此不同，从而获得最佳电路操作。