Abstract:
A plasma display panel includes a first substrate and a second substrate facing each other with a plurality of discharge cells formed therebetween. A plurality of scan electrodes and a plurality of sustain electrodes are alternately arranged on the second substrate, and a discharge cell comprises a first sustain electrode, a second sustain electrode, and a scan electrode.
Abstract:
A panel driving method in which a single TV field includes at least one reset period and at least one subfield and each of the at least one subfields includes an address period and a sustain period, includes supplying a variable reset pulse according to the length of a pause period in a previous or present TV field. A variable reset period is supplied according to the length of a pause period in a single TV field, so that a reset operation for preparing the address period is stably performed.
Abstract:
A display device for displaying pictures by sequentially performing an address period and a sustain period. The panel pixels are arranged into groups, and an address period and a sustain period are sequentially performed on the pixels of individual groups. While an address period is being performed on the pixels of a group, the pixels of other groups are idle. While a sustain period is being performed on the pixels of the group subsequent to the address period, a sustain period is selectively performed on the pixels of other groups that have already undergone an address period. Accordingly, a sustain discharge operation is performed within a short time after an address operation is performed on the pixels, so that a stable sustain discharge occurs even though narrow scan pulses and address pulses may be applied during the address operation. Also, the time required to address all pixels is reduced.
Abstract:
A PDP driving method. A falling ramp voltage is applied to a scan electrode so as to reset a state of wall charges of a discharge cell during a reset period. In this instance, a sustain electrode is maintained at a high voltage during an initial period for applying the falling ramp voltage, and the voltage at the sustain electrode is reduced to a normal voltage at a latter part of the period for applying the falling ramp voltage. Accordingly, the voltage applied to an address electrode is reduced in an address period since an erased amount of the wall charges of the address electrode is reduced during the reset period.
Abstract:
A panel capacitor is formed by a scan electrode and a sustain electrode. The voltage at the panel capacitor is reduced by turning on a transistor coupled between the scan electrode and the capacitor. As a result, the voltage within the panel capacitor exceeds the discharge firing voltage to discharge the panel capacitor. When the gate voltage of the transistor is reduced by an RC circuit, the transistor is turned off, and the scan electrode is floated. A discharge is then steeply quenched, and wall charges are finely controlled. Next, the above-noted operation is repeated by turning on the transistor.
Abstract:
A method for driving a plasma display panel, including a reset period, an address period, and a sustain discharge period, wherein the reset period has a rising ramp section. During the rising ramp section of the reset period, a flat period of maintaining a peak voltage of a rising ramp applied to a scan electrode is maintained for longer than a period until a variation in a state of wall charges of the scan electrode is ended in all discharge cells.
Abstract:
A plasma display panel (PDP) and driving method that includes a floating reset process. A number of subfields are generated from input video signals, and subfield data for each subfield are output. A first voltage is applied to the first electrode according to sustain information to cause a discharge in a first discharge space, and the first electrode is floated during a period which corresponds to subfield data of a previous subfield. During this process, the floating time is controlled according to the number of addressed cells called for in previous subfield data.
Abstract:
In a plasma display device, sustain electrodes are divided into first and second groups. A frame period is divided into subfields. In one subfield, discharge cells of the first group are initialized during a first reset period and addressed during a first address period and cells of the second group are initialized during a second reset period and addressed during a second address period. During a subsequent subfield, the cells of the second group are reset and addressed before the cells of the first group. The first reset period is an auxiliary reset period for initializing cells having been sustain-discharged in a previous subfield. The second reset period is a main reset period that may be used for initializing cells that were not sustain-discharged immediately prior to the main reset period. A final voltage is maintained longer during auxiliary reset than main reset.
Abstract:
Disclosed is a reset waveform of a plasma display panel. A rising or falling voltage is applied rapidly enough to cause an intense discharge in a reset period. The electrodes are then floated to reduce the voltage applied into a discharge space during the discharge to cause a self-quenching of the discharge, thereby precisely controlling wall charges.
Abstract:
A plasma display panel and a driving method thereof. In the plasma display panel, Y electrodes are divided into a plurality of groups according to a scanning order and a final reset voltage is established to be different for each group. The plasma display panel includes a panel including a plurality of first electrodes and second electrodes, a plurality of selection circuits that are respectively coupled to the plurality of the first electrodes, and a driving circuit coupled to the second terminals of the selection circuits. The driving circuit includes a transistor which allows the voltage at the first electrodes to be reduced in a ramp style in a reset period.