公开(公告)号：US08067952B2

公开(公告)日：2011-11-29

申请号：US12283868

申请日：2008-04-18

申请人： Ming-Dou Ker ,  Wen-Yi Chen ,  Hsin-Chin Jiang

发明人： Ming-Dou Ker ,  Wen-Yi Chen ,  Hsin-Chin Jiang

IPC分类号： G01R31/02 ,  G01R31/26

CPC分类号： G01R19/0053 ,  G01R31/002

摘要： An ESD detection circuit for detecting a level of an ESD voltage on a power rail is provided. The ESD detection circuit includes a resistive component, a diode unit, and a controller. The resistive component is coupled between a detection node and a ground node corresponding to the power rail. The diode unit is coupled between the power rail and the detection node in a forward direction toward the power rail. The controller, coupled to the detection node, is used for determining the level of the ESD voltage based on the voltage of the detection node and the breakdown voltage of the diode unit.

摘要翻译： 提供了用于检测电力轨上的ESD电压电平的ESD检测电路。 ESD检测电路包括电阻元件，二极管单元和控制器。 电阻分量耦合在检测节点和对应于电力轨的接地节点之间。 二极管单元在电力轨道和检测节点之间朝向电力轨道向前方向耦合。 耦合到检测节点的控制器用于基于检测节点的电压和二极管单元的击穿电压来确定ESD电压的电平。

公开(公告)号：US07889470B2

公开(公告)日：2011-02-15

申请号：US12656495

申请日：2010-02-01

申请人： Ming-Dou Ker ,  Yuan-Wen Hsiao ,  Ryan Hsin-Chin Jiang

发明人： Ming-Dou Ker ,  Yuan-Wen Hsiao ,  Ryan Hsin-Chin Jiang

IPC分类号： H02H9/00

CPC分类号： H01L27/0266 ,  H01L2924/0002 ,  H01L2924/00

摘要： An ESD protection circuit is provided. The circuit includes a discharging component, a diode, and an ESD detection circuit. The discharging component is coupled between an input/output pad and a first power line of an IC. The diode is coupled between the input/output pad and a second power line of the IC in a forward direction toward the second power line. The ESD detection circuit includes a capacitor, a resistor, and a triggering component. The capacitor and the resistor are formed in series and coupled between the first power line and the second power line. The triggering component has a positive power end coupled to the input/output pad and a negative power end coupled to the first power line. An input of the triggering component is coupled to a node between the capacitor and the resistor.

摘要翻译： 提供ESD保护电路。 电路包括放电元件，二极管和ESD检测电路。 放电元件耦合在IC的输入/输出焊盘和第一电源线之间。 所述二极管在所述输入/输出焊盘和所述IC的第二电源线之间朝向所述第二电力线向前方连接。 ESD检测电路包括电容器，电阻器和触发部件。 电容器和电阻器串联形成并耦合在第一电源线和第二电源线之间。 触发组件具有耦合到输入/输出焊盘的正功率端和耦合到第一电源线的负功率端。 触发元件的输入耦合到电容器和电阻器之间的节点。

公开(公告)号：US07786504B2

公开(公告)日：2010-08-31

申请号：US12076556

申请日：2008-03-20

申请人： Wen-Yi Chen ,  Ryan Hsin-Chin Jiang ,  Ming-Dou Ker

发明人： Wen-Yi Chen ,  Ryan Hsin-Chin Jiang ,  Ming-Dou Ker

IPC分类号： H01L29/74

CPC分类号： H01L27/0262 ,  H01L29/747 ,  H01L29/87

摘要： The present invention discloses a bidirectional PNPN silicon-controlled rectifier comprising: a p-type substrate; a N-type epitaxial layer; a P-type well and two N-type wells all formed inside the N-type epitaxial layer with the two N-type wells respectively arranged at two sides of the P-type well; a first semiconductor area, a second semiconductor area and a third semiconductor area all formed inside the P-type well and all coupled to an anode, wherein the second semiconductor area and the third semiconductor area are respectively arranged at two sides of the first semiconductor area, and wherein the first semiconductor area is of first conduction type, and the second semiconductor area and the third semiconductor area are of second conduction type; and two P-type doped areas respectively formed inside the N-type wells, wherein each P-type doped area has a fourth semiconductor area neighboring the P-type well and a fifth semiconductor area, and wherein both the fourth semiconductor area and the fifth semiconductor area are coupled to a cathode, and wherein the fourth semiconductor area is of second conduction type, and the fifth semiconductor area is of first conduction type.

摘要翻译： 本发明公开了一种双向PNPN可控硅整流器，包括：p型衬底; N型外延层; 所有形成在N型外延层内的P型阱和两个N型阱，两个N型阱分别布置在P型阱的两侧; 所述第一半导体区域，第二半导体区域和第三半导体区域全部形成在所述P型阱内并全部耦合到阳极，其中所述第二半导体区域和所述第三半导体区域分别布置在所述第一半导体区域的第二半导体区域 并且其中所述第一半导体区域是第一导电类型，并且所述第二半导体区域和所述第三半导体区域是第二导电类型; 分别形成在N型阱内部的两个P型掺杂区域，其中每个P型掺杂区域具有与P型阱相邻的第四半导体区域和第五半导体区域，并且其中第四半导体区域和第五半导体区域 半导体区域耦合到阴极，并且其中第四半导体区域是第二导电类型，并且第五半导体区域是第一导电类型。

公开(公告)号：US20100142107A1

公开(公告)日：2010-06-10

申请号：US12656495

申请日：2010-02-01

申请人： Ming-Dou Ker ,  Yuan-Wen Hsiao ,  Ryan Hsin-Chin Jiang

发明人： Ming-Dou Ker ,  Yuan-Wen Hsiao ,  Ryan Hsin-Chin Jiang

IPC分类号： H02H9/04

CPC分类号： H01L27/0266 ,  H01L2924/0002 ,  H01L2924/00

摘要： An ESD protection circuit is provided. The circuit includes a discharging component, a diode, and an ESD detection circuit. The discharging component is coupled between an input/output pad and a first power line of an IC. The diode is coupled between the input/output pad and a second power line of the IC in a forward direction toward the second power line. The ESD detection circuit includes a capacitor, a resistor, and a triggering component. The capacitor and the resistor are formed in series and coupled between the first power line and the second power line. The triggering component has a positive power end coupled to the input/output pad and a negative power end coupled to the first power line. An input of the triggering component is coupled to a node between the capacitor and the resistor.

公开(公告)号：US20100033164A1

公开(公告)日：2010-02-11

申请号：US12188000

申请日：2008-08-07

申请人： Ming Dou KER ,  Wen Yi CHEN ,  Hsin Chin JIANG

发明人： Ming Dou KER ,  Wen Yi CHEN ,  Hsin Chin JIANG

IPC分类号： G01R19/00

CPC分类号： G01R19/0053 ,  G01R19/04 ,  G01R29/26 ,  G01R31/002

摘要： A transient noise detection circuit for detecting a level of a transient noise voltage is disclosed. The transient noise detection circuit comprises a triggering circuit, a rectifying circuit, and a controller. The triggering circuit is coupled between a power rail and a ground node. When the triggering circuit receives a transient noise, the triggering circuit generates a triggering signal. The rectifying circuit comprises a rectifying unit and a current-limiting unit coupled in series. When the rectifying unit receives the triggering signal from the triggering circuit, the rectifying unit will be triggered by the triggering signal. The controller is coupled to a detection node between the rectifying unit and the current-limiting unit. The controller is used for determining the level of the transient noise voltage based on the voltage of the detection node.

摘要翻译： 公开了一种用于检测瞬态噪声电压电平的瞬态噪声检测电路。 瞬态噪声检测电路包括触发电路，整流电路和控制器。 触发电路耦合在电源轨和接地节点之间。 当触发电路接收到瞬态噪声时，触发电路产生触发信号。 整流电路包括串联耦合的整流单元和限流单元。 当整流单元从触发电路接收到触发信号时，整流单元将被触发信号触发。 控制器耦合到整流单元和限流单元之间的检测节点。 控制器用于根据检测节点的电压确定瞬态噪声电压的电平。

公开(公告)号：US07656627B2

公开(公告)日：2010-02-02

申请号：US11826634

申请日：2007-07-17

申请人： Ming-Dou Ker ,  Yuan-Wen Hsiao ,  Ryan Hsin-Chin Jiang

发明人： Ming-Dou Ker ,  Yuan-Wen Hsiao ,  Ryan Hsin-Chin Jiang

IPC分类号： H02H9/00

CPC分类号： H01L27/0266 ,  H01L2924/0002 ,  H01L2924/00

摘要： An ESD protection circuit is provided. The circuit includes a discharging component, a diode, and an ESD detection circuit. The discharging component is coupled between an input/output pad and a first power line of an IC. The diode is coupled between the input/output pad and a second power line of the IC in a forward direction toward the second power line. The ESD detection circuit includes a capacitor, a resistor, and a triggering component. The capacitor and the resistor are formed in series and coupled between the first power line and the second power line. The triggering component has a positive power end coupled to the input/output pad and a negative power end coupled to the first power line. An input of the triggering component is coupled to a node between the capacitor and the resistor.

摘要翻译： 提供ESD保护电路。 电路包括放电元件，二极管和ESD检测电路。 放电元件耦合在IC的输入/输出焊盘和第一电源线之间。 所述二极管在所述输入/输出焊盘和所述IC的第二电源线之间朝向所述第二电力线向前方连接。 ESD检测电路包括电容器，电阻器和触发部件。 电容器和电阻器串联形成并耦合在第一电源线和第二电源线之间。 触发组件具有耦合到输入/输出焊盘的正功率端和耦合到第一电源线的负功率端。 触发元件的输入耦合到电容器和电阻器之间的节点。

公开(公告)号：US20090287435A1

公开(公告)日：2009-11-19

申请号：US12283868

申请日：2008-04-18

申请人： Ming Dou KER ,  Wen Yi CHEN ,  Hsin Chin JIANG

发明人： Ming Dou KER ,  Wen Yi CHEN ,  Hsin Chin JIANG

IPC分类号： G01R19/00

CPC分类号： G01R19/0053 ,  G01R31/002

摘要： An ESD detection circuit for detecting a level of an ESD voltage on a power rail is provided. The ESD detection circuit includes a resistive component, a diode unit, and a controller. The resistive component is coupled between a detection node and a ground node corresponding to the power rail. The diode unit is coupled between the power rail and the detection node in a forward direction toward the power rail. The controller, coupled to the detection node, is used for determining the level of the ESD voltage based on the voltage of the detection node and the breakdown voltage of the diode unit.

摘要翻译： 提供了用于检测电力轨上的ESD电压电平的ESD检测电路。 ESD检测电路包括电阻元件，二极管单元和控制器。 电阻分量耦合在检测节点和对应于电力轨的接地节点之间。 二极管单元在电力轨道和检测节点之间朝向电力轨道向前方向耦合。 耦合到检测节点的控制器用于基于检测节点的电压和二极管单元的击穿电压来确定ESD电压的电平。

公开(公告)号：US20090273006A1

公开(公告)日：2009-11-05

申请号：US12149287

申请日：2008-04-30

申请人： Wen-Yi Chen ,  Ryan Hsin-Chin Jiang ,  Ming-Dou Ker

发明人： Wen-Yi Chen ,  Ryan Hsin-Chin Jiang ,  Ming-Dou Ker

IPC分类号： H01L29/72

CPC分类号： H01L29/747 ,  H01L27/0262 ,  H01L29/87

摘要： The present invention discloses a bidirectional silicon-controlled rectifier, wherein the conventional field oxide layer, which separates an anode structure from a cathode structure, is replaced by a field oxide layer having floating gates, a virtual gate or a virtual active region. Thus, the present invention can reduce or escape from the bird's beak effect of a field oxide layer, which results in crystalline defects, a concentrated current and a higher magnetic field and then causes abnormal operation of a rectifier. Thereby, the present invention can also reduce signal loss.

摘要翻译： 本发明公开了一种双向硅控整流器，其中将阳极结构与阴极结构分开的常规场氧化物层由具有浮动栅极，虚拟栅极或虚拟有源区域的场氧化物层代替。 因此，本发明可以减少或逃避场氧化物层的鸟喙作用，这导致晶体缺陷，集中电流和较高的磁场，然后导致整流器的异常操作。 由此，本发明也可以减少信号损失。

公开(公告)号：US20090236631A1

公开(公告)日：2009-09-24

申请号：US12076556

申请日：2008-03-20

申请人： Wen-Yi Chen ,  Ryan Hsin-Chin Jiang ,  Ming-Dou Ker

发明人： Wen-Yi Chen ,  Ryan Hsin-Chin Jiang ,  Ming-Dou Ker

IPC分类号： H01L29/747

CPC分类号： H01L27/0262 ,  H01L29/747 ,  H01L29/87

摘要： The present invention discloses a bidirectional PNPN silicon-controlled rectifier comprising: a p-type substrate; a N-type epitaxial layer; a P-type well and two N-type wells all formed inside the N-type epitaxial layer with the two N-type wells respectively arranged at two sides of the P-type well; a first semiconductor area, a second semiconductor area and a third semiconductor area all formed inside the P-type well and all coupled to an anode, wherein the second semiconductor area and the third semiconductor area are respectively arranged at two sides of the first semiconductor area, and wherein the first semiconductor area is of first conduction type, and the second semiconductor area and the third semiconductor area are of second conduction type; and two P-type doped areas respectively formed inside the N-type wells, wherein each P-type doped area has a fourth semiconductor area neighboring the P-type well and a fifth semiconductor area, and wherein both the fourth semiconductor area and the fifth semiconductor area are coupled to a cathode, and wherein the fourth semiconductor area is of second conduction type, and the fifth semiconductor area is of first conduction type.

摘要翻译： 本发明公开了一种双向PNPN可控硅整流器，包括：p型衬底; N型外延层; 所有形成在N型外延层内的P型阱和两个N型阱，两个N型阱分别布置在P型阱的两侧; 所述第一半导体区域，第二半导体区域和第三半导体区域全部形成在所述P型阱内并全部耦合到阳极，其中所述第二半导体区域和所述第三半导体区域分别布置在所述第一半导体区域的第二半导体区域 并且其中所述第一半导体区域是第一导电类型，并且所述第二半导体区域和所述第三半导体区域是第二导电类型; 分别形成在N型阱内部的两个P型掺杂区域，其中每个P型掺杂区域具有与P型阱相邻的第四半导体区域和第五半导体区域，并且其中第四半导体区域和第五半导体区域 半导体区域耦合到阴极，并且其中第四半导体区域是第二导电类型，并且第五半导体区域是第一导电类型。

公开(公告)号：US20090009916A1

公开(公告)日：2009-01-08

申请号：US12114485

申请日：2008-05-02

申请人： Ming-Dou Ker ,  Kuo-Chun Hsu ,  Hsin-Chin Jiang

发明人： Ming-Dou Ker ,  Kuo-Chun Hsu ,  Hsin-Chin Jiang

IPC分类号： H02H3/22

CPC分类号： H01L27/0266

摘要： An electrostatic discharge protection circuit that includes at least two transistors connected in a stacked configuration, a first diffusion region of a first dopant type shared by two adjacent transistors, and a second diffusion region of a second dopant type formed in the first diffusion region. A substrate-triggered site is induced into the device structure of the stacked transistors to improve ESD robustness and turn-on speed. An area-efficient layout to realize the stacked transistors is proposed. The stacked transistors may be implemented in ESD protection circuits with a mixed-voltage I/O interface, or in integrated circuits with multiple power supplies. The stacked transistors are fabricated without using a thick-gate mask.

摘要翻译： 一种静电放电保护电路，其包括以堆叠结构连接的至少两个晶体管，由两个相邻晶体管共享的第一掺杂剂类型的第一扩散区域和形成在第一扩散区域中的第二掺杂剂类型的第二扩散区域。 衬底触发位置被引入堆叠晶体管的器件结构，以提高ESD稳健性和开启速度。 提出了实现堆叠晶体管的区域效率布局。 堆叠晶体管可以在具有混合电压I / O接口的ESD保护电路中或在具有多个电源的集成电路中实现。 在不使用厚栅掩模的情况下制造堆叠晶体管。