-
公开(公告)号：US09619063B2
公开(公告)日：2017-04-11
申请号：US14415373
申请日：2014-04-25
Inventor： Xiangdong Wei , Xueguang Hao , Cheng Li , Seongjun An , Bongyeol Ryu
IPC: G06F3/041 , G06F3/044 , H01L27/12 , H01L29/66 , H01L29/786
CPC classification number: G06F3/0412 , G06F3/044 , G06F2203/04103 , G06F2203/04107 , H01L27/1218 , H01L27/1222 , H01L27/124 , H01L27/1248 , H01L27/1259 , H01L29/66757 , H01L29/78675
Abstract: Embodiments of the present invention provide an array substrate and a manufacturing method thereof and a touch display device. The array substrate comprises multiple data lines, multiple gate lines and multiple thin film transistors. The data lines and the gate lines intersect with each other in different planes to divide the array substrate into multiple pixel units, in each of which a thin film transistor is provided, wherein the array substrate further comprises multiple first touch sensing electrodes and multiple second touch sensing electrodes. The first touch sensing electrodes are provided below active regions of the thin film transistors and also serve as metal shielding layers for blocking light emitted by a backlight source. The first touch sensing electrodes and the second touch sensing electrodes intersect with each other in different planes, and capacitances are formed at intersections of the first touch sensing electrodes and the second touch sensing electrodes.
-
72.发明授权公开(公告)号：US09354478B2
公开(公告)日：2016-05-31
申请号：US14316429
申请日：2014-06-26
Inventor： Xueguang Hao , Cheng Li , Xiangdong Wei , An Seong Jun , Bongyeol Ryu
IPC: G02F1/1362 , H01L27/12
CPC classification number: G02F1/136286 , G02F1/136209 , G02F2001/136222 , H01L27/124
Abstract: Disclosed is a display substrate, including: a substrate; gate lines and data lines arranged in a crisscrossed pattern on the substrate; pixel units surrounded by the gate lines and the data lines, each of which includes a thin film transistor and a pixel electrode; a color filter layer disposed on the substrate and including at least one color region, a vertical projection of the pixel electrode within one of the pixel units on the substrate being within a vertical projection of one color region of the color filter layer on the substrate; and a black matrix disposed over the gate lines, the data lines and the thin film transistors, a vertical projection of all of the gate lines, the data lines and the thin film transistors on the substrate being within a vertical projection of the black matrix on the substrate.
Abstract translation: 公开了一种显示基板，包括：基板; 栅极线和数据线，以交叉图案布置在基板上; 由栅极线和数据线围绕的像素单元，每个像素单元包括薄膜晶体管和像素电极; 滤色器层，设置在所述基板上并且包括至少一个颜色区域，所述基板上的所述像素单元之一内的像素电极的垂直投影在所述基板上的所述滤色器层的一个颜色区域的垂直投影内; 以及布置在栅极线，数据线和薄膜晶体管之上的黑矩阵，衬底上的所有栅极线，数据线和薄膜晶体管的垂直投影在黑矩阵的垂直投影内 底物。
-
公开(公告)号：US12300172B2
公开(公告)日：2025-05-13
申请号：US18273239
申请日：2022-07-05
Inventor： Zhenhua Zhang , Dongfang Yang , Xilei Cao , Xueguang Hao , Lang Liu , Jingyi Feng , Changlong Yuan , Xiaoxin Li , Li Zhu
IPC: G09G3/3233 , G09G3/20 , H10K59/121
Abstract: A pixel circuit and a driving method therefor and a display panel are provided. The pixel circuit includes a driving circuit, a data writing circuit, a storage circuit, and a first reset circuit; the driving circuit includes a control terminal, a first terminal, and a second terminal, and is configured to control a driving current flowing through the first terminal and the second terminal for driving a light-emitting element to emit light; the data write circuit is configured to write a data signal into the control terminal of the driving circuit; the storage circuit is configured to store the data signal; the first reset circuit is configured to apply a first initialization voltage to the control terminal of the driving circuit; the driving circuit and the data write circuit each include an N-type thin film transistor; and the first reset circuit includes an N-type oxide thin film transistor.
-
公开(公告)号：US12232385B2
公开(公告)日：2025-02-18
申请号：US18551067
申请日：2022-08-24
Inventor： Jingbo Xu , Xueguang Hao , Jingquan Wang , Xinyin Wu , Lu Bai
IPC: G09G3/3233 , G02F1/1362 , G02F1/1368 , G09G3/3266 , G09G3/36 , H10K59/122 , H10K59/131 , H10K59/80
Abstract: A display substrate and a display panel are disclosed. The display substrate includes a base substrate, and the base substrate includes a display region and a peripheral region on at least one side of the display region. The display region includes pixel units arranged in an array, first gate scanning signal lines, and second gate scanning signal lines; the peripheral region includes a first scanning driving circuit connected to the first gate scanning signal lines through first connection wires, a first scanning driving circuit connected to the second gate scanning signal lines through second connection wires, a first voltage signal line configured to provide a first voltage, and a second voltage signal line configured to provide a second voltage, and the second scanning driving circuit is on a side of the first scanning driving circuit close to the display region. The following is a clean version of the amended Abstract with the above-indicated changes/markings incorporated.
-
公开(公告)号：US12211452B2
公开(公告)日：2025-01-28
申请号：US18572742
申请日：2023-05-31
Inventor： Miao Liu , Xueguang Hao , Libin Liu , Teng Chen , Xinyin Wu , Yong Qiao , Xing Yao , Jingquan Wang
IPC: G09G3/3266 , G09G3/20 , G09G3/3233 , G11C19/28 , H10K59/121 , H10K59/126
Abstract: The display substrate includes a shift register arranged on a base substrate, and the shift register includes a plurality of stages of driving circuits; a plurality of stages of the driving circuit are provided in the driving circuit area of the base substrate; a stage of driving circuit area includes a first area and a second area, and the first area is provided with a first type of transistor included in the driving circuit, a second type of transistor included in the driving circuit is provided in the second area; one side of the first area is a side of the power line away from the second area, and the other side of the first area is a side close to the second area of an active layer of the first type of transistor close to the second area.
-
Patent Agency Ranking
公开(公告)号：US12002422B2
公开(公告)日：2024-06-04
申请号：US17293086
申请日：2020-09-14
Inventor： Hongfei Cheng , Xueguang Hao , Hui Li , Chen Xu , Pan Li
IPC: G09G3/3233 , G09G3/3266 , H10K59/121 , H10K59/123 , H10K59/131 , H01L27/12
CPC classification number: G09G3/3233 , G09G3/3266 , H10K59/1213 , H10K59/123 , H10K59/131 , G09G2300/0426 , G09G2300/0819 , G09G2300/0842 , G09G2300/0861 , G09G2310/0202 , G09G2310/0286 , H01L27/124
Abstract: A display substrate and a display device. The display substrate includes a base substrate and a plurality of sub-pixels, a first power line and an electrical connection layer on the base substrate. Each sub-pixel includes a pixel circuit, and a plurality of sub-pixels are arranged in a plurality of rows and a plurality of columns along a first direction and a second direction. The sub-pixel is electrically connected with the light-emitting element through the electrical connection layer, and the portion, which is in the display region of the display substrate, of the electrical connection layer is not overlapped with the first power line in a direction perpendicular to the base substrate.
-
公开(公告)号：US11770909B2
公开(公告)日：2023-09-26
申请号：US17297130
申请日：2020-06-24
Inventor： Yongda Ma , Jianbo Xian , Xueguang Hao , Chen Xu
CPC classification number: H05K5/0217 , H05K5/0017 , H05K5/03
Abstract: A display device includes: a display panel; a housing configured to support and protect the display panel; a bracket disposed between the display panel and the housing; a plurality of sensors fixed on the bracket; a window located in the display panel or in the housing, and configured to expose at least one of the plurality of sensors; and a driver configured to control the bracket to rotate in a plane parallel to the display panel, and to control the bracket to stop rotating when a required sensor rotates to a position of the window.
-
78.发明授权公开(公告)号：US11488513B2
公开(公告)日：2022-11-01
申请号：US16475513
申请日：2019-01-08
Inventor： Jianbo Xian , Chen Xu , Xueguang Hao , Yong Qiao
IPC: G09G3/3266 , G09G3/20
Abstract: A shift register unit, a circuit structure, a gate drive circuit, a drive circuit and a display device are provided. A shift register unit includes a substrate and an input circuit, a reset circuit, a first output circuit, a first output terminal, a first connection conductive portion connecting both the input circuit and the reset circuit, a second connection conductive portion connecting both the reset circuit and the first output circuit, and a third connection conductive portion connecting both the first output circuit and the first output terminal, all of which are on the substrate.
-
79.发明授权公开(公告)号：US11475826B2
公开(公告)日：2022-10-18
申请号：US16622449
申请日：2019-03-18
Inventor： Xinguo Li , Chen Xu , Xinyin Wu , Yong Qiao , Xueguang Hao
IPC: G09G3/20 , G09G3/00 , G09G3/3225 , G11C19/28
Abstract: The present disclosure relates to a shift register for a display panel. The shift register may include an input terminal, an output terminal, an input unit, an output unit, a first control unit, a second control unit, and a first isolation unit. The output unit may be configured to transmit a first level or a second level to an output terminal based on levels of a first node and a second node.
-
公开(公告)号：US20220036822A1
公开(公告)日：2022-02-03
申请号：US17278692
申请日：2020-07-30
Inventor： Pan Li , Xueguang Hao , Chen Xu
IPC: G09G3/3233
Abstract: A pixel driving circuit, an array substrate and a display device are provided. The pixel driving circuit includes a first interlayer dielectric layer and a second interlayer dielectric layer. The first interlayer dielectric layer is arranged on the side of a gate layer lead away from a base substrate and is formed with a first via hole exposing the gate layer lead. The second interlayer dielectric layer is arranged on the side of the first interlayer dielectric layer away from the base substrate and is formed with a second via hole exposing the first via hole. A source drain layer lead is arranged on the side of the second interlayer dielectric layer away from the base substrate and is electrically connected to the gate layer lead through the first via hole and the second via hole.
-
-
-
-
-
-
-
-
-
Search Results
95
records
(took 0.024 seconds)
