Display substrate, crack detection method thereof and display device

    公开(公告)号:US12100704B2

    公开(公告)日:2024-09-24

    申请号:US17432223

    申请日:2020-10-27

    CPC classification number: H01L27/0296 G01N27/60 H01L27/0266 H01L27/124

    Abstract: The disclosure relates to a display substrate, including: a base substrate including a display area and a peripheral area surrounding the display area; a first crack detection line located in the peripheral area and surrounding the display area; a second crack detection line located in the peripheral area and surrounding the display area; at least one first electrostatic discharge circuit located in the peripheral area, each including at least one first thin film transistor, the at least one first thin film transistor including a first gate; and at least one second electrostatic discharge circuit located in the peripheral area and electrically connected to the second crack detection line, each including at least one second thin film transistor, the at least one second thin film transistor including a second gate, wherein the second gate is electrically connected to the first gate.

    Display substrate and display device

    公开(公告)号:US11984458B2

    公开(公告)日:2024-05-14

    申请号:US17311889

    申请日:2020-10-20

    CPC classification number: H01L27/1255 H01L27/124 H01L27/1248

    Abstract: The present disclosure provides a display substrate and a display device. The display substrate includes a display region and a frame region surrounding the display region. The display region includes a first region and a second region, and the quantity of sub-pixels connected to each gate line in the first region is less than the quantity of sub-pixels connected to each gate line in the second region. The display substrate includes a signal line arranged in the frame region, an orthogonal projection of each gate line in the first region onto a base substrate of the display substrate partially overlaps an orthogonal projection of the signal line onto the base substrate, and a capacitor is formed between the signal line and the gate line in the first region to increase a load capacitance of the gate line in the first region.

    ARRAY SUBSTRATE AND DISPLAY APPARATUS
    76.
    发明公开

    公开(公告)号:US20240147792A1

    公开(公告)日:2024-05-02

    申请号:US18407506

    申请日:2024-01-09

    CPC classification number: H10K59/131 G09G3/3258 G09G2300/0426 G09G2300/0842

    Abstract: An array substrate is provided. The array substrate includes a node connecting line in a same layer as a respective one of the plurality of voltage supply lines, connected to a first capacitor electrode through a first via, and connected to a semiconductor material layer through a second via; and an interference preventing block in a same layer as the second capacitor electrode. Along the first direction, a portion of the node connecting line at a position connecting to the semiconductor material layer through the second via is spaced apart from a first adjacent data line by a first arm, and is spaced apart from a second adjacent data line by a second arm. An orthographic projection of a respective one of the plurality of voltage supply lines on the base substrate substantially covers at least 30% of an orthographic projection of the second arm on the base substrate.

    ARRAY SUBSTRATE AND DISPLAY APPARATUS

    公开(公告)号:US20220367590A1

    公开(公告)日:2022-11-17

    申请号:US17311606

    申请日:2020-11-17

    Abstract: An array substrate is provided. The array substrate includes a gate line extending along a first direction. The gate line includes a plurality of wide portions and a plurality of narrow portions respectively arranged along the first direction, the plurality of wide portions having a first dimension greater than a second dimension of the plurality of narrow portions along a second direction, the second direction at an angle in a range of 80 degrees to 100 degrees with respect to the first direction. An orthographic projection of a respective one of the plurality of wide portions in the respective subpixel on the base substrate overlaps with an orthographic projection of a portion of the semiconductor material layer in the respective subpixel on the base substrate, forming an active layer of the data-write transistor in the respective subpixel.

    Display substrate and display device

    公开(公告)号:US11423840B2

    公开(公告)日:2022-08-23

    申请号:US17272777

    申请日:2020-07-31

    Abstract: A display substrate and a display device are provided. A sub-pixel of the display substrate includes a light emitting element and a pixel circuit which includes a first connecting portion, a driving transistor and a threshold compensation transistor, an electrode of the threshold compensation transistor is electrically connected with a gate electrode of the driving transistor through the first connecting portion. The sub-pixel includes a first color sub-pixel pair which includes a first pixel block and a second pixel block. A ratio of an overlapping area between orthographic projections of the second electrode and the first connecting portion of the first pixel block on the base substrate to an overlapping area between orthographic projections of the second electrode and the first connecting portion of the second pixel block on the base substrate is in a range from 0.8 to 1.2.

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