公开(公告)号：US07236422B2

公开(公告)日：2007-06-26

申请号：US11274201

申请日：2005-11-16

申请人： Hiroshi Kageyama ,  Mitsuhide Miyamoto ,  Hajime Akimoto

发明人： Hiroshi Kageyama ,  Mitsuhide Miyamoto ,  Hajime Akimoto

IPC分类号： G11C8/00

CPC分类号： G09G3/20 ,  G09G3/3291 ,  G09G3/3688 ,  G09G2300/0408 ,  G09G2310/027 ,  G09G2310/0297 ,  G09G2310/08

摘要： A data driver circuit which enables the square measure of the non-display areas of image display devices to be reduced is to be provided. The driver circuit has two DA converters which convert the digital signals, in accordance with more significant bits thereof, into analog voltages; a voltage divider which divides the output voltages of the two DA converters in accordance with less significant bits of the signals; and a shift register which generates trigger signals in synchronism with the digital signals. The voltage divider, arranged in the gap between the two DA converters, comprises memory elements arrayed in two-dimensional matrixes, and a plurality of resistive wirings. The memory elements store decoded signals generated by the decoders in synchronism with the trigger signals, and selectively supply, in accordance with the decoded signals stored by the memory elements, the divided voltages which derive from the two DA converters and are generated on the resistive wirings.

摘要翻译： 提供能够减少图像显示装置的非显示区域的平方测量的数据驱动器电路。 驱动器电路具有两个DA转换器，它们将数字信号根据更高有效位转换为模拟电压; 分压器，其根据信号的较低有效位分割两个DA转换器的输出电压; 以及与数字信号同步产生触发信号的移位寄存器。 布置在两个DA转换器之间的间隙中的分压器包括以二维矩阵排列的存储元件和多个电阻布线。 存储器元件与触发信号同步地存储由解码器产生的解码信号，并且根据由存储器元件存储的解码信号选择性地提供从两个DA转换器导出并在电阻布线上产生的分压 。

公开(公告)号：US20070200818A1

公开(公告)日：2007-08-30

申请号：US11673836

申请日：2007-02-12

申请人： Mitsuhide Miyamoto ,  Hajime Akimoto

发明人： Mitsuhide Miyamoto ,  Hajime Akimoto

IPC分类号： G09G3/36

CPC分类号： G09G3/20 ,  G09G3/3208 ,  G09G3/3688 ,  G09G2310/0221 ,  G09G2310/0275 ,  G09G2330/021

摘要： An image display device for displaying a screen containing both moving image data, and image data stored in the internal memory with lower power consumption. The image display device contains a switch for controlling transfer to a display area for image data stored in the internal memory installed outside the display area, and a switch for controlling transfer to a display area for image data (such as moving image data) other than the image data stored in the internal memory. The image display device controls switching according to the display position of both image data types.

摘要翻译： 一种用于以较低的功耗显示包含运动图像数据和存储在内部存储器中的图像数据的屏幕的图像显示装置。 图像显示装置包括用于控制向显示区域传送存储在安装在显示区域外部的内部存储器中的图像数据的开关，以及用于控制向除了显示区域之外的图像数据（诸如运动图像数据）的显示区域的传送的开关 存储在内部存储器中的图像数据。 图像显示装置根据两个图像数据类型的显示位置来控制切换。

公开(公告)号：US20060120203A1

公开(公告)日：2006-06-08

申请号：US11274201

申请日：2005-11-16

申请人： Hiroshi Kageyama ,  Mitsuhide Miyamoto ,  Hajime Akimoto

发明人： Hiroshi Kageyama ,  Mitsuhide Miyamoto ,  Hajime Akimoto

IPC分类号： G11C8/00

CPC分类号： G09G3/20 ,  G09G3/3291 ,  G09G3/3688 ,  G09G2300/0408 ,  G09G2310/027 ,  G09G2310/0297 ,  G09G2310/08

摘要： A data driver circuit which enables the square measure of the non-display areas of image display devices to be reduced is to be provided. The driver circuit has two DA converters which convert the digital signals, in accordance with more significant bits thereof, into analog voltages; a voltage divider which divides the output voltages of the two DA converters in accordance with less significant bits of the signals; and a shift register which generates trigger signals in synchronism with the digital signals. The voltage divider, arranged in the gap between the two DA converters, comprises memory elements arrayed in two-dimensional matrixes, and a plurality of resistive wirings. The memory elements store decoded signals generated by the decoders in synchronism with the trigger signals, and selectively supply, in accordance with the decoded signals stored by the memory elements, the divided voltages which derive from the two DA converters and are generated on the resistive wirings.

摘要翻译： 提供能够减少图像显示装置的非显示区域的平方测量的数据驱动器电路。 驱动器电路具有两个DA转换器，它们将数字信号根据更高有效位转换为模拟电压; 分压器，其根据信号的较低有效位分割两个DA转换器的输出电压; 以及与数字信号同步产生触发信号的移位寄存器。 布置在两个DA转换器之间的间隙中的分压器包括以二维矩阵排列的存储元件和多个电阻布线。 存储器元件与触发信号同步地存储由解码器产生的解码信号，并且根据由存储器元件存储的解码信号选择性地提供从两个DA转换器导出并在电阻布线上产生的分压 。

公开(公告)号：US20070205999A1

公开(公告)日：2007-09-06

申请号：US11657483

申请日：2007-01-25

申请人： Hajime Akimoto ,  Mitsuhide Miyamoto

发明人： Hajime Akimoto ,  Mitsuhide Miyamoto

IPC分类号： G09G5/00

CPC分类号： G06F3/042 ,  G06F3/0412 ,  G09G3/20 ,  G09G3/3233 ,  G09G3/3648 ,  G09G2300/08 ,  G09G2300/0842 ,  G09G2300/0852 ,  G09G2360/148

摘要： An image display apparatus for resolving the problem that read out of high-sensitivity optical signals was impossible when there is a strong backlight effect on displays of the related art and particularly liquid crystal displays. The above problem is resolved by an image display apparatus containing an optical signal summing unit for summing the optical signals output from multiple light sensing pixels, and the optical signal reader includes a function for reading out the optical signals summed by the optical signal summing unit.

摘要翻译： 当在现有技术的显示器，特别是液晶显示器上存在强的背光效应时，用于解决读出高灵敏度光信号的问题的图像显示装置是不可能的。 上述问题由包含用于对从多个感光像素输出的光信号相加的光信号求和单元的图像显示装置解决，光信号读取器包括用于读出由光信号求和单元求和的光信号的功能。

公开(公告)号：US20050206640A1

公开(公告)日：2005-09-22

申请号：US10913443

申请日：2004-08-09

申请人： Mitsuhide Miyamoto ,  Hajime Akimoto

发明人： Mitsuhide Miyamoto ,  Hajime Akimoto

IPC分类号： G02F1/133 ,  G02F1/136 ,  G09G3/20 ,  G09G3/36 ,  G09G5/00 ,  H01L29/786 ,  H02M3/00 ,  H03K19/0185

CPC分类号： G09G3/20 ,  G09G2300/0408 ,  G09G2310/0275 ,  G09G2310/0289

摘要： The invention provides an image display panel to which a low voltage can be directly applied without largely increasing the number of input terminals. In the image display panel, n pieces of level shifters LSa for boosting n pieces of input signals VIN supplied from the outside are provided. An input of each of the level shifters is connected to one end of one of capacitances via a switching element. The other end of the capacitance C1 is grounded and the other ends of capacitances C2 and C3 are grounded via switching elements. Each of the switching elements operates according to complementary clocks CLK and CLKB of positive and negative phases boosted by a level shifter LS0 to switch connection of the capacitances from parallel connection to serial connection, thereby boosting the voltage by three times. The boosted voltage is output via an inverter. In such a manner, the image display panel can boost an input signal by two complementary clock signal lines without requiring a number of inversion signals. Since an input signal is not directly connected to the gate of an FET, it is not influenced by variations in thresholds.

摘要翻译： 本发明提供一种能够直接施加低电压的图像显示面板，而不会大大增加输入端子的数量。 在图像显示面板中，设置n个用于升压从外部提供的n条输入信号VIN的电平移位器LSa。 每个电平移位器的输入通过开关元件连接到一个电容的一端。 电容C 1的另一端接地，电容C 2和C 3的另一端通过开关元件接地。 每个开关元件根据由电平移位器LS0升压的正相和负相的互补时钟CLK和CLKB进行工作，以将电容从并联连接切换到串行连接，从而将电压提高三倍。 升压电压通过变频​​器输出。 以这种方式，图像显示面板可以通过两个互补时钟信号线提升输入信号，而不需要多个反转信号。 由于输入信号不直接连接到FET的栅极，因此不受阈值变化的影响。

公开(公告)号：US08207918B2

公开(公告)日：2012-06-26

申请号：US12480804

申请日：2009-06-09

申请人： Tohru Kohno ,  Takahide Kuranaga ,  Hiroshi Kageyama ,  Hajime Akimoto

发明人： Tohru Kohno ,  Takahide Kuranaga ,  Hiroshi Kageyama ,  Hajime Akimoto

IPC分类号： G09G3/30

CPC分类号： G09G3/3233 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2310/0251 ,  G09G2310/061 ,  G09G2320/0233 ,  G09G2320/043

摘要： During a first period of a set period, a reset switch element of each pixel is turned on to converge a voltage at a control electrode of a TFT to a predetermined voltage, and a step signal having a first voltage level is supplied from a step signal generation circuit. During a second period of the set period, the reset switch element is turned off, and a step signal having a second voltage level is supplied from the step signal generation circuit, whereby a voltage exceeding a second power supply voltage or a voltage exceeding a voltage range supplied from a signal driver section is input as a characteristic value set voltage to the control electrode. Accordingly, even when a relationship between a gate voltage and a drain current of the thin film transistor exhibits a hysteresis characteristic, uniform display can be achieved.

摘要翻译： 在设定周期的第一时段期间，每个像素的复位开关元件导通，以将TFT的控制电极处的电压收敛到预定电压，并且从步进信号提供具有第一电压电平的阶跃信号 一代电路。 在设定期间的第二期间，关闭复位开关元件，从步进信号生成电路提供具有第二电压电平的阶跃信号，由此超过第二电源电压或超过电压的电压 从信号驱动器部提供的范围作为特性值设定电压被输入到控制电极。 因此，即使当薄膜晶体管的栅极电压和漏极电流之间的关系呈现滞后特性时，也能实现均匀的显示。

公开(公告)号：US20090309865A1

公开(公告)日：2009-12-17

申请号：US12480804

申请日：2009-06-09

申请人： Tohru Kohno ,  Takahide Kuranaga ,  Hiroshi Kageyama ,  Hajime Akimoto

发明人： Tohru Kohno ,  Takahide Kuranaga ,  Hiroshi Kageyama ,  Hajime Akimoto

IPC分类号： G06F3/038 ,  G09G3/32

CPC分类号： G09G3/3233 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2310/0251 ,  G09G2310/061 ,  G09G2320/0233 ,  G09G2320/043

摘要： During a first period of a set period, a reset switch element of each pixel is turned on to converge a voltage at a control electrode of a TFT to a predetermined voltage, and a step signal having a first voltage level is supplied from a step signal generation circuit. During a second period of the set period, the reset switch element is turned off, and a step signal having a second voltage level is supplied from the step signal generation circuit, whereby a voltage exceeding a second power supply voltage or a voltage exceeding a voltage range supplied from a signal driver section is input as a characteristic value set voltage to the control electrode. Accordingly, even when a relationship between a gate voltage and a drain current of the thin film transistor exhibits a hysteresis characteristic, uniform display can be achieved.

摘要翻译： 在设定周期的第一时段期间，每个像素的复位开关元件导通，以将TFT的控制电极处的电压收敛到预定电压，并且从步进信号提供具有第一电压电平的阶跃信号 一代电路。 在设定期间的第二期间，关闭复位开关元件，从步进信号生成电路提供具有第二电压电平的阶跃信号，由此超过第二电源电压或超过电压的电压 从信号驱动器部提供的范围作为特性值设定电压被输入到控制电极。 因此，即使当薄膜晶体管的栅极电压和漏极电流之间的关系呈现滞后特性时，也能实现均匀的显示。

公开(公告)号：US08035601B2

公开(公告)日：2011-10-11

申请号：US11750637

申请日：2007-05-18

申请人： Tohru Kohno ,  Hajime Akimoto

发明人： Tohru Kohno ,  Hajime Akimoto

IPC分类号： G09G3/36

CPC分类号： G09G3/2092 ,  G09G3/3233 ,  G09G3/3648 ,  G09G2310/0289

摘要： The present invention provide an image display device including a level shift circuit not requiring a clock signal nor a control signal from the outside and operating at a low voltage and ensuring a high yield.The level shift circuit comprises a pair of transistors each having a source electrode connected to a power, a gate electrode and a drain electrode (the gate electrode and the drain electrode of one of the transistors being connected with the drain electrode and the gate electrode of the other (cross coupling)); and transistors each having an a source electrode connected to a low voltage source or the ground, a drain electrode connected to a connection point for the cross coupling, and a gate electrode, one of the gate electrodes being connected to an input signal and the other being connected to an input inversion signal. The level shift circuit has also a transistor having a gate electrode connected to a connection point for the cross-coupling, a drain electrode connected to a connection point for cross-coupling forming a pair with the cross-coupling connection point, and a source electrode, one of the source electrodes being connected to an input signal and the other being connected to an input inversion signal. The transistor with at least the gate electrode connected to the cross-coupling connection point is a TFT formed on an insulating substrate.

摘要翻译： 本发明提供了一种图像显示装置，其包括不需要时钟信号的电平移位电路和来自外部的控制信号，并且以低电压工作并确保高产量。 电平移位电路包括一对晶体管，每个晶体管的源电极连接到电源，栅电极和漏电极（晶体管中的一个的栅电极和漏电极与漏电极和栅电极连接 另一个（交叉耦合））; 以及各自具有连接到低电压源或地的源电极的晶体管，连接到用于交叉耦合的连接点的漏极和栅电极，其中一个栅电极连接到输入信号，而另一个 连接到输入反相信号。 电平移位电路还具有连接到用于交叉耦合的连接点的栅电极的晶体管，连接到与交叉耦合连接点形成一对的交叉耦合的连接点的漏极和源电极 源电极中的一个连接到输入信号，另一个连接到输入反转信号。 至少连接到交叉耦合连接点的栅电极的晶体管是形成在绝缘基板上的TFT。

公开(公告)号：US20100156966A1

公开(公告)日：2010-06-24

申请号：US12637826

申请日：2009-12-15

申请人： Hiroshi KAGEYAMA ,  Tohru Kohno ,  Takahide Kuranaga ,  Hajime Akimoto

发明人： Hiroshi KAGEYAMA ,  Tohru Kohno ,  Takahide Kuranaga ,  Hajime Akimoto

IPC分类号： G09G5/10

CPC分类号： G09G3/3233 ,  G09G3/2014 ,  G09G3/3266 ,  G09G2300/0465 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2320/0626

摘要： An image display device includes a first drive mode and a second drive mode. When N indicates an integer equal to or larger than 2(N≧2), a first to N-th frames are N successive frames, and j indicates an integer equal to or larger than 1. During a write period for a k-th (1≦k≦N) frame in the first drive mode, a scanning circuit sequentially selects a (k+N(j−1))-th display line, and a drive circuit supplies analog video voltages for the (k+N (j−1))-th display line to a plurality of signal lines. During a write period for all frames in the second drive mode, the scanning circuit sequentially selects all display lines, and the drive circuit supplies the analog video voltages for all the display lines to the plurality of signal lines.

摘要翻译： 图像显示装置包括第一驱动模式和第二驱动模式。 当N表示等于或大于2（N≥2）的整数时，第一至第N帧为N个连续帧，j表示等于或大于1的整数。在第k个 （k + N（j-1））个显示行，驱动电路为第（k + N（j-1））个显示行提供模拟视频电压， j-1）） - 显示线到多条信号线。 在第二驱动模式下的所有帧的写周期期间，扫描电路依次选择所有显示行，并且驱动电路将所有显示行的模拟视频电压提供给多条信号线。

公开(公告)号：US20100201675A1

公开(公告)日：2010-08-12

申请号：US12699106

申请日：2010-02-03

申请人： Takahide KURANAGA ,  Tohru Kohno ,  Hajime Akimoto ,  Hiroshi Kageyama

发明人： Takahide KURANAGA ,  Tohru Kohno ,  Hajime Akimoto ,  Hiroshi Kageyama

IPC分类号： G06F3/038

CPC分类号： G09G3/325 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2320/045 ,  G09G2330/045 ,  H01L27/3244

摘要： Provided is an image display device, which includes: a display area including a plurality of pixels each of which includes a self light-emitting element; and a plurality of signal lines for inputting an image voltage to each of the plurality of pixels, in which: each of the plurality of pixels includes a field-effect transistor for driving the self light-emitting element based on the image voltage which is input through each of the plurality of signal lines to each of the plurality of pixels; the display area is divided into at least two regions including a first region and a second region; and a (channel width-to-channel length) ratio of the field-effect transistor in the first region is smaller than the ratio of any field-effect transistor in the second region.

摘要翻译： 提供了一种图像显示装置，其包括：包括多个像素的显示区域，每个像素包括自发光元件; 以及多个用于将图像电压输入到多个像素中的多个信号线，其中：所述多个像素中的每一个包括用于基于所输入的图像电压驱动所述自发光元件的场效应晶体管 通过所述多个信号线中的每一个到所述多个像素中的每一个; 显示区域被分成包括第一区域和第二区域的至少两个区域; 并且第一区域中的场效应晶体管的（沟道宽度 - 沟道长度）比小于第二区域中的任何场效应晶体管的比率。