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公开(公告)号：US20210297131A1
公开(公告)日：2021-09-23
申请号：US17264776
申请日：2019-07-30
Applicant: Innophase, Inc. , Parallel Wireless, Inc.
Inventor： Yang Xu , Steven Paul Papa
IPC: H04B7/06 , H04B7/08 , H04B7/0417
Abstract: Methods disclosed herein may include configuring a plurality of transceiver modules in an antenna array with assigned receive signal weighting factors, the transceiver modules interconnected with high-speed data communication buses, and each transceiver module positioned adjacent to a respective antenna element in the antenna array; configuring the plurality of transceiver modules into inter-communicating module groups by enabling the associated high-speed data communication buses; receiving a plurality of wireless data signals with the plurality of transceiver modules and responsively generating a corresponding plurality of receive baseband data signals; generating a plurality of received beamformed signals by combining subsets of the receive baseband signals within each module group using the assigned receive signal weighting factors by transmitting the receive baseband signals between the transceiver modules within the module group; and demodulating the received beamformed signals.
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公开(公告)号：US10992278B2
公开(公告)日：2021-04-27
申请号：US16811883
申请日：2020-03-06
Applicant: Innophase, Inc.
Inventor： Nicolo Testi , Yang Xu
Abstract: A low noise amplifier includes at least two variable gain amplifier stages, each variable gain amplifier configured to accept an input signal and to provide a load driving signal; a tunable bandpass filter connected as a load to each variable gain amplifier stage, wherein each bandpass filter includes a resonant tank, each resonant tank including an inductor, wherein each inductor of each resonant tank is oriented in orthogonal relation with respect to each respective longitudinal axis of each next inductor, the orthogonal relation of the respective longitudinal axes configured to reduce mutual coupling between the tunable bandpass filters; a cross-coupled transistor pair, and at least one cross-coupled compensation transistor pair biased in a subthreshold region configured to add a transconductance component as a function of a load driving signal; and, a controller circuit configured to tune each tunable bandpass filter.
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公开(公告)号：US10720931B2
公开(公告)日：2020-07-21
申请号：US16384770
申请日：2019-04-15
Applicant: Innophase, Inc.
Inventor： Yang Xu , Sara Munoz Hermoso , Roc Berenguer Perez
Abstract: Wideband polar receivers and method of operation are described. A phase-modulated input signal is received at a polar receiver that includes an injection-locked oscillator. The injection-locked oscillator includes a plurality of injection points. Based on the frequency of the input signal, a particular Nth harmonic is selected, and the input signal is injected at the set of injection points corresponding to the selected Nth harmonic. The injection-locked oscillator generates an oscillator output signal, and the phase of the input signal is determined from the phase of the oscillator output signal. In some embodiments, the oscillator output signal is frequency-multiplied by N, mixed with the input signal, and filtered for use in amplitude detection. The input signal is decoded based on the phase and amplitude information.
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公开(公告)号：US20200221382A1
公开(公告)日：2020-07-09
申请号：US16241988
申请日：2019-01-07
Applicant: Innophase, Inc.
Inventor： Per Konradsson , Yang Xu
Abstract: Selectively enabling an amplitude processing circuit and a phase processing circuit of a wireless station's polar receiver with respect to reception of a beacon signal. Such systems and methods may include sequentially demodulating symbols of the received beacon signal using at least the phase processing circuit to detect a traffic indication signal value in a data payload portion of the received beacon signal. Upon detecting a condition indicating no data traffic for the wireless station, the phase processing circuit may be turned off. The polar receiver may demodulate symbols of the received beacon signal and upon detecting a beacon preamble symbol sequence, shut off the amplitude processing circuit and set the amplitude to a fixed value. The phase processing circuit in conjunction with the fixed amplitude value may be used to demodulate symbols of the beacon signal.
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75.发明申请公开(公告)号：US20200220756A1
公开(公告)日：2020-07-09
申请号：US16241842
申请日：2019-01-07
Applicant: Innophase Inc.
Abstract: A polar transmitter including a digital power amplifier cell that includes a first circuit and an amplifier circuit. The first circuit is configured to receive a phase modulated carrier signal and to generate a PMOS control signal and an NMOS control signal such that the PMOS control signal and the NMOS control signal have different duty cycles. The amplifier circuit is configured to receive the PMOS control signal at a PMOS transistor and the NMOS control signal at an NMOS transistor. The first circuit is configured to align the PMOS control signal and the NMOS control signal with respect to one another such that a time that the NMOS transistor and the PMOS transistor of the amplifier circuit are simultaneously conducting is minimized. The amplifier circuit is configured to generate an amplified modulated carrier signal in response to the PMOS and NMOS control signals.
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Patent Agency Ranking
公开(公告)号：US20200083893A1
公开(公告)日：2020-03-12
申请号：US16125510
申请日：2018-09-07
Applicant: Innophase, Inc.
Inventor： Per Konradsson , Yang Xu , Sara Munoz Hermoso
Abstract: A method and circuit for linearizing a frequency response of an oscillator controlled by a plurality of capacitor banks are disclosed. In the disclosed method, for each capacitor bank of at least two capacitor banks of the oscillator, a respective sensitivity characteristic of the capacitor bank is determined. Further, a set of reference output frequency control words (FCWs) for an associated set of frequencies of the oscillator are determined. When an input FCW is received and an output FCW is responsively provided based on (i) an interpolation between two reference output FCWs of the set of reference output FCWs and (ii) the respective sensitivity characteristics of the at least two capacitor banks of the oscillator. The output FCW is then applied to the at least two capacitor banks of the oscillator.
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公开(公告)号：US10476540B2
公开(公告)日：2019-11-12
申请号：US16160521
申请日：2018-10-15
Applicant: Innophase, Inc.
Inventor： Yang Xu , Sara Munoz Hermoso
IPC: H04B1/16 , H04J1/02 , H04L27/06 , H04L27/22 , H04L27/14 , H04L27/38 , H04W4/80 , H04L27/233 , H04B14/00 , H04L27/00
Abstract: Circuitry and methods are described for digital signal demodulation. In a configurable receiver, a method includes receiving a radio frequency signal at the configurable receiver, operating the configurable receiver in a first mode, the first mode including providing the radio frequency signal to an amplitude detection circuit to determine an amplitude, providing the radio frequency signal to a phase detection circuit to determine a phase, and providing the amplitude and phase to a coordinate rotation digital computer (CORDIC) logic circuit, and operating the configurable receiver in a low power mode upon receiving an indication to selectively disable the amplitude detection circuit, the low power mode including providing the radio frequency signal to the phase detection circuit to determine the phase, and providing the phase and a predetermined constant value in lieu of the amplitude to the CORDIC logic circuit.
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公开(公告)号：US20190268028A1
公开(公告)日：2019-08-29
申请号：US16286548
申请日：2019-02-26
Applicant: Parallel Wireless, Inc. , Innophase, Inc.
Inventor： Steven Paul Papa , Yang Xu
Abstract: A microcomponent massive MIMO array is presented. The microcomponent massive array includes a general purpose processor and an integrated power amplifier and transmitter device including a software defined radio (SDR) and a plurality of polar power amplifiers (PAs) disposed on a single integrated circuit, wherein the integrated power amplifier and transmitter device is in communication with the general purpose processor. The microcomponent massive MIMO array further includes an antenna array in communication with the integrated power amplifier and transmitter device.
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公开(公告)号：US20190238146A1
公开(公告)日：2019-08-01
申请号：US16384770
申请日：2019-04-15
Applicant: Innophase, Inc.
Inventor： Yang Xu , Sara Munoz Hermoso , Roc Berenguer Perez
CPC classification number: H03L7/24 , H03D3/007 , H03D2200/006 , H04L27/389
Abstract: Wideband polar receivers and method of operation are described. A phase-modulated input signal is received at a polar receiver that includes an injection-locked oscillator. The injection-locked oscillator includes a plurality of injection points. Based on the frequency of the input signal, a particular Nth harmonic is selected, and the input signal is injected at the set of injection points corresponding to the selected Nth harmonic. The injection-locked oscillator generates an oscillator output signal, and the phase of the input signal is determined from the phase of the oscillator output signal. In some embodiments, the oscillator output signal is frequency-multiplied by N, mixed with the input signal, and filtered for use in amplitude detection. The input signal is decoded based on the phase and amplitude information.
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公开(公告)号：US20170324420A1
公开(公告)日：2017-11-09
申请号：US15614560
申请日：2017-06-05
Applicant: Innophase Inc.
Inventor： Yang Xu , Sara Munoz Hermoso , Roc Berenguer Perez
CPC classification number: H03L7/24 , H03D3/007 , H03D2200/006 , H04L27/389
Abstract: Wideband polar receivers and method of operation are described. A phase-modulated input signal is received at a polar receiver that includes an injection-locked oscillator. The injection-locked oscillator includes a plurality of injection points. Based on the frequency of the input signal, a particular Nth harmonic is selected, and the input signal is injected at the set of injection points corresponding to the selected Nth harmonic. The injection-locked oscillator generates an oscillator output signal, and the phase of the input signal is determined from the phase of the oscillator output signal. In some embodiments, the oscillator output signal is frequency-multiplied by N, mixed with the input signal, and filtered for use in amplitude detection. The input signal is decoded based on the phase and amplitude information.
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