Abstract:
A liquid crystal display apparatus includes an array substrate, a color filter substrate and a liquid crystal layer. The array substrate includes a transparent substrate, a plurality of pixel electrodes, a plurality of switching devices, a data line, a gate line and a light blocking pattern. The light blocking pattern is disposed on the transparent substrate. The light blocking pattern overlaps with at least a portion of the pixel electrodes neighboring each other and at least a portion of the data line. The light blocking pattern is disposed between the data line and the transparent substrate.
Abstract:
A liquid crystal display (LCD) panel simplifying its testing and manufacturing. The LCD panel includes (formed on a substrate) gate lines, data lines, and pixels including pixel transistors. The LCD panel further includes a plurality test transistors (e.g., data test transistors for driving the odd and even data lines) formed in a package region of a driving IC (integrated circuit) configured to drive the data lines. The plurality of test transistors may be selectively activated (turned ON) during testing before the driving integrated circuit (Driver IC package) is attached (e.g., fixed) to the driving IC package region. The LCD panel may further include a plurality of gate test transistors configured to drive the odd and even gate lines.
Abstract:
A display panel including a first capacitor and a second capacitor is disclosed. The first and second capacitors boost a second driving voltage from a driving chip and apply the boosted second driving voltage to the driving chip. The driving chip receives the boosted second driving voltage and outputs a first driving voltage to drive the display panel. Thus, the display panel does not require any additional capacitor for boosting the second driving voltage, thereby reducing a thickness and a manufacturing cost of the display panel.
Abstract:
A display device includes gate lines, data lines, storage electrode lines and pixels. Each pixel includes a switching element connected to a gate line and a data line, a liquid crystal capacitor connected to the switching element and a common voltage, and a storage capacitor connected to the switching element and a storage electrode line. Signal generating circuits of the display generate storage signals based on gate signals in such a way that the storage signal applied to each pixel has a changed voltage level immediately after the completion of the charging of the data voltage into the liquid crystal capacitor and the storage capacitor. This enables the pixel electrode to reach the target voltage in a single frame, reduces the power consumption of the display, and improves its response time, reliability and durability.
Abstract:
A thin film transistor (TFT) array panel effectively minimizing light leakage current and a liquid crystal display including the same. The panel includes a transistor structure having a gate electrode formed on an insulating substrate; a semiconductor layer formed on and insulated from the gate electrode; a light blocking layer formed around and overlapping a portion of the gate electrode; a data line intersecting the gate line to form a source electrode, which overlaps a portion of the semiconductor layer; a drain electrode opposing to the source electrode and overlapping a portion of the semiconductor layer, and a pixel electrode formed on and insulated from the transistor structure and electrically connected to the drain electrode.
Abstract:
A liquid crystal display (LCD) panel simplifying its testing and manufacturing. The LCD panel includes (formed on a substrate) gate lines, data lines, and pixels including pixel transistors. The LCD panel further includes a plurality test transistors (e.g., data test transistors for driving the odd and even data lines) formed in a package region of a driving IC (integrated circuit) configured to drive the data lines. The plurality of test transistors may be selectively activated (turned ON) during testing before the driving integrated circuit (Driver IC package) is attached (e.g., fixed) to the driving IC package region. The LCD panel may further include a plurality of gate test transistors configured to drive the odd and even gate lines.
Abstract:
A liquid crystal display (LCD) panel simplifying its testing and manufacturing. The LCD panel includes (formed on a substrate) gate lines, data lines, and pixels including pixel transistors. The LCD panel further includes a plurality test transistors (e.g., data test transistors for driving the odd and even data lines) formed in a package region of a driving IC (integrated circuit) configured to drive the data lines. The plurality of test transistors may be selectively activated (turned ON) during testing before the driving integrated circuit (Driver IC package) is attached (e.g., fixed) to the driving IC package region. The LCD panel may further include a plurality of gate test transistors configured to drive the odd and even gate lines.
Abstract:
A liquid crystal display apparatus including a gate driving circuit disposed on a liquid crystal display is provided. The apparatus further includes a data driving chip, disposed on the liquid crystal display panel, to apply data driving signals to data lines. The gate driving circuit includes a plurality of stages connected to one another in parallel. The odd-numbered stages of the stages each apply gate driving signals to odd-numbered gate lines of the gate lines, in response to a first clock signal and the even-numbered stages of the stages each apply the gate driving signals to even-numbered gate lines of the gate lines, in response to a second clock signal having an opposite phase from a phase of the first clock signal.
Abstract:
A shift register in which multiple stages are connected one after another to each other, the multiple stages having a first stage in which a start signal is coupled to an input terminal, the shift register sequentially outputting output signals of respective stages. The multiple stages have odd stages for receiving a first clock signal, and even stages for receiving a second clock signal having a phase opposite to the first clock signal. Each of the multiple stages has a pull-up section for providing a corresponding one of the first and second clock signals to an output terminal. A pull-up driving section is connected to an input node of the pull-up section. A pull-down section provides a first power voltage to the output terminal. A pull-down driving section is connected to an input node of the pull-down section.
Abstract:
An array panel for a digital X-ray detector including a gate driver (150) is disclosed. A switching element (TFT) is formed in a pixel region defined by gate (110) and data lines (120). A photoelectric cell (130) generates electrons in response to the light supplied from outward. A pixel electrode (260) is formed in the pixel region, and gathers electrons generated from the photoelectric cell (130). A storage capacitor (C) is connected to the drain electrode (225) and stores the electrons gathered in the pixel electrode (260). A gate driver (150) is electrically connected to an end portion of the gate line (110), and provides a scan signal for driving the switching element (TFT). A data pad (140) is electrically connected to an end portion of the data line (120). The electrons stored in the storage capacitor (C) move to the data pad (140) as the switching element (TFT) is turned on. Therefore, the manufacturing cost is reduced, and the manufacturing process is simplified.