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公开(公告)号：US20250014256A1
公开(公告)日：2025-01-09
申请号：US18895814
申请日：2024-09-25
Inventor： Tadamasa TOMA , Kiyofumi Abe , Takahiro Nishi , Chong Soon Lim , Han Boon Teo , Jingying Gao , Praveen Kumar Yadav
Abstract: A decoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry: decodes expression data indicating information expressed by a person; generates a person equivalent image corresponding to the person through a neural network according to the expression data and at least one profile image of the person; and outputs the person equivalent image.
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公开(公告)号：US12192500B2
公开(公告)日：2025-01-07
申请号：US18355164
申请日：2023-07-19
Inventor： Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Ryuichi Kanoh , Chong Soon Lim , Ru Ling Liao , Hai Wei Sun , Sughosh Pavan Shashidhar , Han Boon Teo , Jing Ya Li
IPC: H04N19/44 , H04N19/105 , H04N19/139 , H04N19/176 , H04N19/513
Abstract: An image encoder includes circuitry and a memory, wherein the circuitry, in operation, determines whether inter prediction is to be applied to a current block; in response to determining that the inter prediction is to be applied to the current block, performs a partition prediction process; and, in response to determining that the inter prediction is not to be applied, encodes the current block without using the partition prediction process. The partition prediction process includes predicting first values of a set of pixels between a first partition and a second partition in the current block, using a first motion vector for the first partition; predicting second values of the set of pixels, using a second motion vector for the second partition; weighting the first values and the second values; and generating a prediction image for the current block using the weighted first values and the weighted second values.
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公开(公告)号：US12166982B2
公开(公告)日：2024-12-10
申请号：US18343393
申请日：2023-06-28
Inventor： Chong Soon Lim , Hai Wei Sun , Sughosh Pavan Shashidhar , Han Boon Teo , Ru Ling Liao , Takahiro Nishi , Tadamasa Toma
IPC: H04N19/119 , H04N19/176 , H04N19/50 , H04N19/60
Abstract: An encoder according to one aspect of the present disclosure encodes a block of an image, and includes a processor and memory connected to the processor. Using the memory, the processor partitions a block into a plurality of sub blocks and encodes a sub block included in the plurality of sub blocks in an encoding process including at least a transform process or a prediction process. The block is partitioned using a multiple partition including at least three odd-numbered child nodes and each of a width and a height of each of the plurality of sub blocks is a power of two.
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公开(公告)号：US12149701B2
公开(公告)日：2024-11-19
申请号：US18467531
申请日：2023-09-14
Inventor： Ru Ling Liao , Chong Soon Lim , Hai Wei Sun , Han Boon Teo , Jing Ya Li , Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma
IPC: H04N19/30 , H04N19/105 , H04N19/119 , H04N19/132 , H04N19/137 , H04N19/159 , H04N19/176
Abstract: An image encoder or decoder includes circuitry and a memory coupled to the circuitry. The circuitry, in operation, predicts a first set of samples for a first partition of a current picture with one or more motion vectors including a first motion vector and predicts a second set of samples for a first portion of the first partition with one or more motion vectors from a second partition different from the first partition. The samples of the first set of samples of the first portion of the first partition and of the second set of samples of the first portion of the first partition are weighted. A motion vector for the first portion of the first partition is stored which is based on one or both of the first motion vector and the second motion vector. The first partition is encoded or decoded using at least the weighted samples of the first portion of the first partition.
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公开(公告)号：US20240380886A1
公开(公告)日：2024-11-14
申请号：US18781294
申请日：2024-07-23
Inventor： Han Boon Teo , Hai Wei Sun , Chong Soon Lim , Jing Ya Li , Chu Tong Wang , Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma
IPC: H04N19/117 , H04N19/105 , H04N19/46 , H04N19/80
Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry: executes a second process of applying a second filter to the first image to generate a second image, not holding the second image as a reference image, holding the first image as a reference image, and displaying the second image; writes coefficients of each of one or more filter candidates that are candidates for the second filter into a bitstream, wherein the coefficients are included in a first storage location when written into the bitstream; and writes a parameter that specifies, for each image, one of the one or more filter candidates as the second filter into the bitstream, wherein the parameter is included in a second storage location when written into the bitstream, and the second storage location is different from the first storage location.
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Patent Agency Ranking
公开(公告)号：US20240357103A1
公开(公告)日：2024-10-24
申请号：US18763019
申请日：2024-07-03
Inventor： Chong Soon LIM , Hai Wei Sun , Han Boon Teo , Jing Ya Li , Che Wei Kuo , Kiyofumi Abe , Tadamasa Toma , Takahiro Nishi , Yusuke Kato
IPC: H04N19/117 , H04N19/176 , H04N19/51 , H04N19/80
CPC classification number: H04N19/117 , H04N19/176 , H04N19/51 , H04N19/80
Abstract: An encoder that encodes a current block to be encoded in an image is provided. The encoder includes: processor; and memory coupled to the processor, in which, in operation, the processor: generates a first prediction image based on a motion vector, the first prediction image being an image with full-pel precision; generates a second prediction image using an interpolation filter by interpolating a value at a fractional-pel position between full-pel positions included in the first prediction image; and encodes the current block based on the second prediction image, and in the using of the interpolation filter, the interpolation filter is switched between a first interpolation filter and a second interpolation filter differing in a total number of taps from the first interpolation filter.
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公开(公告)号：US12114004B2
公开(公告)日：2024-10-08
申请号：US18065513
申请日：2022-12-13
Inventor： Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Ryuichi Kanoh , Chong Soon Lim , Ru Ling Liao , Hai Wei Sun , Sughosh Pavan Shashidhar , Han Boon Teo , Jing Ya Li
IPC: H04N19/51 , H04N19/176 , H04N19/182
CPC classification number: H04N19/51 , H04N19/176 , H04N19/182
Abstract: An encoder includes circuitry and a memory coupled to the circuitry, wherein the circuitry, in operation, performs a partition process. The partition process includes calculating first values of a set of pixels between a first partition and a second partition in a current block, using a first motion vector for the first partition; calculating second values of the set of pixels, using a second motion vector for the second partition; and calculating third values of the set of pixels by weighting the first values and the second values. When a ratio of a width to a height of the current block is larger than 4 or a ratio of the height to the width of the current block is larger than 4, the circuitry disables the partition process.
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公开(公告)号：US20240323444A1
公开(公告)日：2024-09-26
申请号：US18675858
申请日：2024-05-28
Inventor： Hai Wei SUN , Chong Soon Lim , Han Boon Teo , Jing Ya Li , Che Wei Kuo , Chu Tong Wang , Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma
IPC: H04N19/70 , H04N19/124 , H04N19/132 , H04N19/186 , H04N19/80
CPC classification number: H04N19/70 , H04N19/124 , H04N19/132 , H04N19/186 , H04N19/80
Abstract: An encoder: includes circuitry, and memory coupled to the circuitry; stores a first parameter into a bitstream, the first parameter indicating whether a syntax element related to a chroma tool offset is present in the bitstream; when the first parameter indicates that the syntax element is present in the bitstream, (i) stores, in the bitstream, one or more second parameters that are used in deblocking filtering for a chroma sample of a current image, in addition to the syntax element, (ii) performs the deblocking filtering using the one or more second parameters, and (iii) encodes the current image; and when the first parameter indicates that the syntax element is not present in the bitstream, encodes the current image without storing the one or more second parameters into the bitstream.
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公开(公告)号：US20240314296A1
公开(公告)日：2024-09-19
申请号：US18675704
申请日：2024-05-28
Inventor： Jing Ya LI , Chong Soon Lim , Han Boon Teo , Hai Wei Sun , Che Wei Kuo , Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Yusuke Kato
IPC: H04N19/105 , H04N19/159 , H04N19/176 , H04N19/52
CPC classification number: H04N19/105 , H04N19/159 , H04N19/176 , H04N19/52
Abstract: Provided is an encoder includes: circuitry; and memory coupled to the circuitry, in which in operation, the circuitry: generates a prediction image of a current block to be processed, using a first motion vector; and updates a history based motion vector predictor (HMVP) table using a first candidate having the first motion vector, the HMVP table storing, in a first in first out (FIFO) method, a plurality of second candidates each having a second motion vector used for a processed block, and in the updating of the HMVP table, the circuitry: determines whether a size of the current block is less than or equal to a threshold size; and skips the updating of the HMVP table when the size of the current block is determined to be less than or equal to the threshold size.
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公开(公告)号：US20240291972A1
公开(公告)日：2024-08-29
申请号：US18657076
申请日：2024-05-07
Inventor： Ru Ling LIAO , Chong Soon Lim , Jing Ya Li , Han Boon Teo , Hai Wei Sun , Che Wei Kuo , Yusuke Kato , Tadamasa Toma , Kiyofumi Abe , Takahiro Nishi
IPC: H04N19/107 , H04N19/176
CPC classification number: H04N19/107 , H04N19/176
Abstract: An image encoder includes: circuitry; and a memory coupled to the circuitry. The circuitry, in operation: calculates first values of a current block using intra prediction, the intra prediction being limited to planar mode, the planar mode using multiple reference pixels for each pixel location of the current block; calculates second values of the current block using inter prediction; calculates third values of the current block by weighting the first values and the second values; and encodes the current block using the third values, and in the calculating of the third values, a first weight is applied to the first values and a second weight is applied to the second values, the second weight being different from the first weight.
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