-
公开(公告)号:US20220368911A1
公开(公告)日:2022-11-17
申请号:US17742128
申请日:2022-05-11
Applicant: QUALCOMM Incorporated
Inventor: Louis Joseph Kerofsky , Dmytro Rusanovskyy , Marta Karczewicz
IPC: H04N19/126 , H04N19/18 , H04N19/176 , H04N19/70
Abstract: Techniques for performing inverse transform operations on high bit-depth video data are described. A video decoder may receive encoded video data encoded at a first bit-depth in an encoded video bitstream. The video decoder may determine one or more of a dequantization shift or a mid-transform shift based on information in the encoded video bitstream, and perform an inverse transform on the encoded video data at a second bit-depth using the dequantization shift and the mid-transform shift, wherein the second bit-depth is lower than the first bit-depth.
-
公开(公告)号:US20220337825A1
公开(公告)日:2022-10-20
申请号:US17810969
申请日:2022-07-06
Applicant: QUALCOMM Incorporated
Inventor: Marta Karczewicz , Wei-Jung Chien , Li Zhang
IPC: H04N19/117 , H04N19/14 , H04N19/70 , H04N19/82 , H04N19/463 , H04N19/136 , H04N19/176 , H04N19/80
Abstract: An example device for filtering a decoded block of video data includes one or more processing units configured to construct a plurality of filters for classes of blocks of a current picture of video data. To construct the plurality of filters for each of the classes, the processing units are configured to determine a value of a flag that indicates whether a fixed filter is used to predict a set of filter coefficients of the class, and in response to the fixed filter being used to predict the set of filter coefficients, determine an index value into a set of fixed filters and predict the set of filter coefficients of the class using a fixed filter of the set of fixed filters identified by the index value.
-
公开(公告)号:US20220329823A1
公开(公告)日:2022-10-13
申请号:US17715571
申请日:2022-04-07
Applicant: QUALCOMM Incorporated
Inventor: Chun-Chi Chen , Han Huang , Zhi Zhang , Yao-Jen Chang , Yan Zhang , Vadim Seregin , Marta Karczewicz
IPC: H04N19/137 , H04N19/105 , H04N19/132 , H04N19/176
Abstract: A video decoder can be configured to determine that a current block in a current picture of the video data is coded in an affine prediction mode; determine one or more control-point motion vectors (CPMVs) for the current block; identify an initial prediction block for the current block in a reference picture using the one or more CPMVs; determine a current template for the current block in the current picture; and determine an initial reference template for the initial prediction block in the reference picture; and perform a motion vector refinement process to determine a modified prediction block based on a comparison of the current template to the initial reference template.
-
公开(公告)号:US20220329800A1
公开(公告)日:2022-10-13
申请号:US17658803
申请日:2022-04-11
Applicant: QUALCOMM Incorporated
Inventor: Bappaditya Ray , Muhammed Zeyd Coban , Louis Joseph Kerofsky , Vadim Seregin , Marta Karczewicz , Keming Cao
IPC: H04N19/12 , H04N19/159 , H04N19/176 , H04N19/46
Abstract: An example device for decoding video data includes a memory configured to store video data; and one or more processors implemented in circuitry and configured to: determine a size of a current block of video data; determine an intra-prediction mode for the current block of video data; determine a mode group including the determined intra-prediction mode, the mode group being one of a plurality of mode groups, each including respective sets of intra-prediction modes; determine a set of available multiple transform selection (MTS) schemes for the current block according to the size and the intra-prediction mode for the current block; determine an MTS scheme from the set of available MTS schemes according to the determined mode group; apply transforms of the MTS scheme to a transform block of the current block to produce a residual block for the current block; and decode the current block using the residual block.
-
公开(公告)号:US11470334B2
公开(公告)日:2022-10-11
申请号:US17028928
申请日:2020-09-22
Applicant: QUALCOMM Incorporated
Inventor: Marta Karczewicz , Hongtao Wang , Yung-Hsuan Chao , Muhammed Zeyd Coban
IPC: H04N19/189 , H04N19/105 , H04N19/176 , H04N19/70 , H04N19/91
Abstract: Embodiments are directed to systems and methods of using rice code in video coding. In one embodiment includes a method of encoding or decoding video data, e.g., on a video encoder or decoder. The method includes determining available residual coefficients neighboring a current position in a transform unit of video data and determining a sum of the available residual coefficients. The method further includes modifying the sum based on the number of available residual coefficients and determining a rice parameter based on the modified sum. The method further includes encoding or decoding a syntax element of video data based on the determined rice parameter.
-
公开(公告)号:US11445203B2
公开(公告)日:2022-09-13
申请号:US16718594
申请日:2019-12-18
Applicant: QUALCOMM Incorporated
Inventor: Luong Pham Van , Geert Van der Auwera , Adarsh Krishnan Ramasubramonian , Marta Karczewicz
IPC: H04N19/159 , H04N19/176 , H04N19/70 , H04N19/105 , H04N19/119
Abstract: A video coder is configured to determine a split type of a block of video data from an intra prediction mode associated with a neighboring block. The video coder may determine an intra prediction mode associated with a neighboring block of the current block of video data, determine a split type of the current block of video data based on the intra prediction mode associated with the neighboring block, split the current block of video data into a plurality of sub-partitions based on the determined split type, and code the plurality of sub-partitions.
-
公开(公告)号:US11425415B2
公开(公告)日:2022-08-23
申请号:US17195527
申请日:2021-03-08
Applicant: QUALCOMM Incorporated
Inventor: Han Huang , Wei-Jung Chien , Marta Karczewicz
IPC: H04N19/52 , H04N19/176 , H04N19/46 , H04N19/55
Abstract: A video encoder and video decoder are configured to encode and decode blocks of video data using affine motion prediction. Affine motion prediction may include predicting control point motion vectors using an affine advanced motion vector prediction (AMVP) motion vector predictor list. The video encoder and video decoder may be configured to construct the affine AMVP motion vector predictor list of candidate control point motion vectors for the block of video data, wherein the affine AMVP motion vector predictor list includes one or more affine motion vector predictors that have all control point motion vectors equal to a designated motion vector.
-
公开(公告)号:US11418779B2
公开(公告)日:2022-08-16
申请号:US16897049
申请日:2020-06-09
Applicant: QUALCOMM Incorporated
Inventor: Nan Hu , Vadim Seregin , Hilmi Enes Egilmez , Marta Karczewicz
IPC: H04N19/17 , H04N19/117 , H04N19/46 , H04N19/186 , H04N19/176
Abstract: A video coder is configured to code an adaptive loop filter (ALF) clipping index as a fixed-length unsigned integer. The video coder may apply, based on the ALF clipping index, an ALF to a block of a picture of the video data.
-
公开(公告)号:US20220256203A1
公开(公告)日:2022-08-11
申请号:US17650935
申请日:2022-02-14
Applicant: QUALCOMM Incorporated
Inventor: Li Zhang , Wei-Jung Chien , Jianle Chen , Xin Zhao , Marta Karczewicz
IPC: H04N19/96 , H04N19/70 , H04N19/593 , H04N19/11 , H04N19/463 , H04N19/186 , H04N19/46
Abstract: An example device includes a memory and processing circuitry in communication with the memory. The processing circuitry of a device is configured to form a most probable mode (MPM) candidate list for a chroma block of the video data stored to the memory, such that the MPM candidate list includes one or more derived modes (DMs) associated with a luma block of the video data associated with the chroma block, and a plurality of luma prediction modes that can be used for coding luminance components of the video data. The processing circuitry is further configured to select a mode from the MPM candidate list, and to code the chroma block according to the mode selected from the MPM candidate list.
-
公开(公告)号:US11412263B2
公开(公告)日:2022-08-09
申请号:US17028899
申请日:2020-09-22
Applicant: QUALCOMM Incorporated
IPC: H04B1/66 , H04N7/12 , H04N11/02 , H04N11/04 , H04N19/70 , H04N19/13 , H04N19/172 , H04N19/174 , H04N19/184
Abstract: Arithmetic coders such as CABAC have high complexity. Some video coding systems limit the ratio of bins coded by the arithmetic coder to bits of encoded data. In order to do so, extra padding or stuffing data is added to the bitstream. Embodiments include ways order to reduce the overhead of such padding, embodiments include ways of processing a video bitstream without including the padding data. For example a video encoder or decoder may code a syntax element of the video bitstream for a unit of video data that indicates a number of padding bits and code the unit of video data without coding (encoding or decoding) the padding bits in the video bitstream.
-
-
-
-
-
-
-
-
-