Method for decoding an audio signal
    71.
    发明授权
    Method for decoding an audio signal 有权
    音频信号解码方法

    公开(公告)号:US07987097B2

    公开(公告)日:2011-07-26

    申请号:US12065270

    申请日:2006-08-30

    IPC分类号: G01L19/00

    CPC分类号: G10L19/008

    摘要: The invention relates to a method for decoding an audio signal, to allow an audio signal to be compressed and transferred more efficiently. The inventive method comprises steps of receiving an audio signal with spatial information signal, obtaining location information using the number of time slot and parameter of audio signal, establishing a multi-channel audio signal by applying spatial information signal to down-mix signal, and performing a multi-channel array for a multi-channel audio signal in response to the output channel.

    摘要翻译: 本发明涉及一种对音频信号进行解码的方法,以便更有效地压缩和传送音频信号。 本发明的方法包括以下步骤:利用空间信息信号接收音频信号,使用时隙的数量和音频信号的参数获得位置信息,通过将空间信息信号应用于降混信号来建立多声道音频信号,以及执行 用于响应于输出通道的多通道音频信号的多通道阵列。

    Methods and apparatuses for encoding and decoding object-based audio signals
    72.
    发明授权
    Methods and apparatuses for encoding and decoding object-based audio signals 有权
    用于对基于对象的音频信号进行编码和解码的方法和装置

    公开(公告)号:US07979282B2

    公开(公告)日:2011-07-12

    申请号:US11865679

    申请日:2007-10-01

    IPC分类号: G10L19/00

    摘要: Provided are an audio encoding method and apparatus and an audio decoding method and apparatus in which audio signals can be encoded or decoded so that sound images can be localized at any desired position for each object audio signal. The audio decoding method includes extracting a downmix signal and object-based side information from an input audio signal; generating rendering information based on input control data; and generating spatial information based on the rendering information and the object-based side information.

    摘要翻译: 提供了一种音频编码方法和装置以及音频解码方法和装置,其中可以对音频信号进行编码或解码,使得声音图像可以被定位在每个对象音频信号的任何期望位置。 音频解码方法包括从输入音频信号中提取降混信号和基于对象的侧信息; 基于输入控制数据生成渲染信息; 以及基于所述呈现信息和所述基于对象的侧面信息来生成空间信息。

    SLOT POSITION CODING OF OTT SYNTAX OF SPATIAL AUDIO CODING APPLICATION
    74.
    发明申请
    SLOT POSITION CODING OF OTT SYNTAX OF SPATIAL AUDIO CODING APPLICATION 有权
    空间音频编码应用的OTT语音的位置编码

    公开(公告)号:US20110022401A1

    公开(公告)日:2011-01-27

    申请号:US12900149

    申请日:2010-10-07

    IPC分类号: G10L19/00

    摘要: Spatial information associated with an audio signal is encoded into a bitstream, which can be transmitted to a decoder or recorded to a storage media. The bitstream can include different syntax related to time, frequency and spatial domains. In some embodiments, the bitstream includes one or more data structures (e.g., frames) that contain ordered sets of slots for which parameters can be applied. The data structures can be fixed or variable. The data structure can include position information that can be used by a decoder to identify the correct slot for which a given parameter set is applied. The slot position information can be encoded with either a fixed number of bits or a variable number of bits based on the data structure type.

    摘要翻译: 与音频信号相关联的空间信息被编码为比特流,其可被发送到解码器或记录到存储介质。 比特流可以包括与时间,频率和空间域相关的不同语法。 在一些实施例中,比特流包括一个或多个数据结构(例如,帧),其包含有序集合的时隙,可以对其应用参数。 数据结构可以是固定的或可变的。 数据结构可以包括可由解码器使用的位置信息来识别应用给定参数集的正确时隙。 基于数据结构类型,时隙位置信息可以用固定数量的位或可变数目的位进行编码。

    Shrinking key generator for parallel process
    80.
    发明授权
    Shrinking key generator for parallel process 有权
    用于并行处理的收缩密钥发生器

    公开(公告)号:US07742598B2

    公开(公告)日:2010-06-22

    申请号:US11155744

    申请日:2005-06-20

    IPC分类号: H04L9/00

    CPC分类号: H04L9/0662 H04L2209/125

    摘要: A parallel processing shrinking key generator is provided. The parallel processing shrinking key generator includes: a selection linear feedback shift register (LFSR); a source LFSR; a selection logic circuit for selecting one of a source bit of the source LFSR and a predetermined input bit according to a selection bit of the selection LFSR; an index counter for assigning an index where output bits of the selection logic circuit are stored at a next clocking of a clock signal; and an output amount register for shifting an output bit of the selection logic circuit according to the assignment of the index counter.

    摘要翻译: 提供并行处理收缩密钥生成器。 并行处理收缩密钥生成器包括:选择线性反馈移位寄存器(LFSR); 来源LFSR; 选择逻辑电路,用于根据选择LFSR的选择位选择源LFSR的源位和预定输入位之一; 索引计数器,用于分配在时钟信号的下一个计时时存储选择逻辑电路的输出位的索引; 以及输出量寄存器,用于根据索引计数器的分配移位选择逻辑电路的输出位。