公开(公告)号：US11415657B2

公开(公告)日：2022-08-16

申请号：US16587221

申请日：2019-09-30

Applicant: Silicon Laboratories Inc.

Inventor： Antonio Torrini ,  Sebastian Ahmed ,  Joel Kauppo ,  Sauli Johannes Lehtimaki

IPC: G01S3/04 ,  G06N3/08 ,  G01S3/28 ,  G01S3/48

Abstract: A system and method of determining the angle of arrival or departure using a neural network is disclosed. The system collects a plurality of I and Q samples as a packet containing a constant tone extension is being received. The I and Q samples are used to form I and Q arrays, which are used as the input to the neural network. The neural network produces a first output representative of the azimuth angle and a second output representative of the elevation angle. In certain embodiments, the neural network is capable of detecting a plurality of angles, where, for each angle, there are three outputs, a first output representative of the azimuth angle, a second output representative of the elevation angle and a third output representative of the relative amplitude. In some embodiments, the neural network is configured to determine the carrier frequency offset of an incoming signal as well.

公开(公告)号：US20220216609A1

公开(公告)日：2022-07-07

申请号：US17705260

申请日：2022-03-25

Applicant: Silicon Laboratories Inc.

Inventor： Attila Zolomy ,  Thomas E. Voor ,  Zoltan Vida

IPC: H01Q7/00 ,  H01Q1/38 ,  H01Q1/22 ,  H01Q1/52 ,  H01Q9/04 ,  H01Q1/48

Abstract: An apparatus includes a substrate and a loop antenna formed using the substrate. The loop antenna includes a set of gaps formed to isolate a first part of the loop antenna from a second part of the loop antenna.

公开(公告)号：US11368359B2

公开(公告)日：2022-06-21

申请号：US17066819

申请日：2020-10-09

Applicant: Silicon Laboratories Inc.

Inventor： Bharat Raju Dandu ,  Robert Alexander

IPC: H04L41/069 ,  G06F11/07 ,  H04W84/18

Abstract: A system and method for remotely monitoring and analyzing devices on a wireless network, such as a ZIGBEE® network, is disclosed. The devices store event logs in a memory device whenever certain events occurs. These event logs are transmitted to a gateway device. The gateway device may operate in standalone mode or in network coprocessor (NCP) mode. The gateway device may then decode the event logs into a human readable output. This human readable output may then be uploaded to a server in the cloud, where further analysis of the human readable output may be performed. This information may then be retrieved by remote devices, such as smart phones. In other modes, the event logs are uploaded to the server in the cloud and the decoding is performed in the cloud.

公开(公告)号：US11366898B2

公开(公告)日：2022-06-21

申请号：US16686486

申请日：2019-11-18

Applicant: Silicon Laboratories Inc.

Inventor： Jeffrey Lee Sonntag ,  Timothy Thomas Rueger

IPC: G06F21/55 ,  H01L23/00 ,  G06F21/72

Abstract: In one form, an integrated circuit includes a plurality of electromagnetic fault injection (EMFI) sensors and a security management circuit. Each EMFI sensor includes a sense loop having a conductor around a corresponding portion of logic circuitry whose operation is affected by an electromagnetic pulse, and a detector circuit coupled to the sense loop and having an output for providing a pulse detection signal in response to a pulse of at least a predetermined magnitude. The security management circuit performs a protection operation to secure the integrated circuit in response to an activation of a corresponding pulse detection signal of one of the plurality of EMFI sensors.

公开(公告)号：US11353903B1

公开(公告)日：2022-06-07

申请号：US17219225

申请日：2021-03-31

Applicant: Silicon Laboratories Inc.

Inventor： Abdulkerim L Coban

IPC: G05F1/567 ,  G05F3/26 ,  G05F1/445 ,  G05F1/46

Abstract: A voltage reference circuit that can operate in a large supply voltage range with high PSRR, that dissipates low-power for a given output noise, and that has a low temperature-coefficient (TC) across a wide-temperature range. The voltage reference circuit does not require any calibration for low TC and high PSRR, occupies a relatively small circuit area, may be used without additional supply filtering in noisy or high-ripple supply environments, and is more robust against device mismatch effects particularly compared to designs based on sub-threshold operations. The voltage reference circuit is a special form of constant transconductance circuit that uses current mirror ratios that are chosen to achieve high PSSR and low noise properties. The device saturation voltage may be chosen so that flat temperature characteristics may be achieved.

公开(公告)号：US20220174632A1

公开(公告)日：2022-06-02

申请号：US17107281

申请日：2020-11-30

Applicant: Silicon Laboratories Inc.

Inventor： John M. Khoury ,  Yan Zhou ,  Michael A. Wu

IPC: H04W56/00

Abstract: In at least one embodiment, a method for measuring a distance between a first communications device including a first local oscillator and a second communications device including a second local oscillator includes unwrapping N phase values to generate N unwrapped phase values. N is an integer greater than one. Each of the N phase values indicate an instantaneous phase of a received signal. The method includes averaging the N unwrapped phase values to generate an average phase value. The method includes wrapping the average phase value to generate a final phase measurement of the first local oscillator with respect to the second local oscillator.

公开(公告)号：US20220174453A1

公开(公告)日：2022-06-02

申请号：US17108908

申请日：2020-12-01

Applicant: Silicon Laboratories Inc.

Inventor： Wentao Li ,  Yan Zhou ,  Michael A. Wu

IPC: H04W4/02 ,  G01S11/02 ,  H04L12/26 ,  G01R23/175

Abstract: A receiver includes a first discrete Fourier transform (DFT) block to perform a first single tone DFT on a positive tone associated with a sounding sequence. A second DFT block performs a second single tone DFT on a negative tone associated with the sounding sequence. A DFT coefficient generation block generates first DFT coefficients based on a nominal frequency of the positive tone and an estimated frequency offset between a transmitter frequency and a receiver frequency. The DFT coefficient generation block generates second DFT coefficients based on a nominal frequency of the negative tone and the estimated frequency offset. Multipliers in the DFT blocks multiply I and Q values of the sounding sequence with the coefficients. Accumulators in the DFT blocks accumulate multiplier outputs. An arctan function receives averaged accumulated values from the first and second DFT blocks and supplies first and second phase values used to calculate fractional timing.

公开(公告)号：US11328755B2

公开(公告)日：2022-05-10

申请号：US16839329

申请日：2020-04-03

Applicant: Silicon Laboratories Inc.

Inventor： Arjun Singhal ,  Subrata Roy

IPC: G06F1/12 ,  G11C7/22 ,  G06F1/3234 ,  G11C7/10 ,  G06F3/06

Abstract: A data producer stores input data in a buffer in response to a slow clock signal and provides read data from the buffer in response to a read pointer signal. A data movement circuit reads the input data from the buffer using the read pointer signal and provides an update read pointer signal in response to reading the input data. The data movement circuit operates in response to a fast clock signal, and includes a metastable-free synchronizer circuit having inputs for receiving the update read pointer signal, the slow clock signal, and the read pointer signal, and an output for providing a synchronized read pointer signal equal to the read pointer signal except between a change in the read pointer signal while the slow clock signal is active until an inactivation of the slow clock signal. The buffer provides the read data in response to the synchronized read pointer signal.

公开(公告)号：US11316482B2

公开(公告)日：2022-04-26

申请号：US16904811

申请日：2020-06-18

Applicant: Silicon Laboratories Inc.

Inventor： Luigi Panseri ,  Mustafa Koroglu ,  Emmanuel Gautier ,  Pascal Blouin

IPC: H03F1/32 ,  H03F3/24 ,  H04B1/04

Abstract: In an embodiment, an apparatus includes: a modulator to modulate a first signal; a distortion circuit coupled to the modulator to digitally pre-distort the first signal to compensate for a distortion of an amplifier; a distortion characterization circuit coupled to the distortion circuit to determine the distortion of the amplifier and configure the distortion circuit based on the determined distortion; a mixer coupled to the distortion circuit to upconvert the pre-distorted first signal to a pre-distorted radio frequency (RF) signal; and the amplifier coupled to the mixer to amplify the pre-distorted RF signal and output an amplified RF signal.

公开(公告)号：US20220116250A1

公开(公告)日：2022-04-14

申请号：US17066242

申请日：2020-10-08

Applicant: Silicon Laboratories Inc.

Inventor： Carlos Jesus Briseno-Vidrios ,  Michael R. May ,  Patrick De Bakker

IPC: H04L27/06

Abstract: An integrated circuit includes a demodulator to demodulate a signal simultaneously transmitted over an isolation communication channel and obtain gate information and configuration information. The demodulator includes a gate demodulation path and a configuration demodulation path. The received signal oscillates at a first frequency to represent a first state, oscillates at different frequencies to represent a seconds state, oscillates at a third frequency (or third and fourth frequencies), which are lower than the first frequency, to represent a third state, and the received signal is steady state to represent a fourth state. The gate demodulation path detects the first and second states. The configuration demodulation path includes first and second sub-demodulation paths. An envelope detector in the first sub-demodulation path detects the second state and the second sub-demodulation path detects the third state. The configuration demodulation paths uses an output of the gate demodulation path.