公开(公告)号：US20220115941A1

公开(公告)日：2022-04-14

申请号：US17066251

申请日：2020-10-08

Applicant: Silicon Laboratories Inc.

Inventor： Michael R. May ,  Fernando Naim Lavalle Aviles ,  Carlos Jesus Briseno-Vidrios ,  Patrick De Bakker ,  Gabor Marek ,  Charles Guo Lin ,  Peter Onody ,  Tamás Marozsák ,  András V. Horváth

IPC: H02M1/08 ,  H03K17/691 ,  H03K17/18

Abstract: An isolated gate driver has a first portion in a first voltage domain and a second portion in a second voltage domain. The first and second portions are coupled by an isolation communication channel. The isolated gate driver transmits across the isolation communication channel a serial word containing first drive strength information and simultaneously transmits gate information with the serial word across the isolation communication channel. The gate information indicates a state of a gate signal for a transistor coupled to the second portion of the isolated gate driver. A demodulator circuit demodulates a signal containing the gate information and the drive strength information transmitted across the isolation communication channel in the serial word. A gate signal output circuit coupled to the demodulator circuit supplies the gate signal based on the gate information with a drive strength of the gate signal being based on the drive strength information.

公开(公告)号：US20220116250A1

公开(公告)日：2022-04-14

申请号：US17066242

申请日：2020-10-08

Applicant: Silicon Laboratories Inc.

Inventor： Carlos Jesus Briseno-Vidrios ,  Michael R. May ,  Patrick De Bakker

IPC: H04L27/06

Abstract: An integrated circuit includes a demodulator to demodulate a signal simultaneously transmitted over an isolation communication channel and obtain gate information and configuration information. The demodulator includes a gate demodulation path and a configuration demodulation path. The received signal oscillates at a first frequency to represent a first state, oscillates at different frequencies to represent a seconds state, oscillates at a third frequency (or third and fourth frequencies), which are lower than the first frequency, to represent a third state, and the received signal is steady state to represent a fourth state. The gate demodulation path detects the first and second states. The configuration demodulation path includes first and second sub-demodulation paths. An envelope detector in the first sub-demodulation path detects the second state and the second sub-demodulation path detects the third state. The configuration demodulation paths uses an output of the gate demodulation path.

公开(公告)号：US20220116249A1

公开(公告)日：2022-04-14

申请号：US17066244

申请日：2020-10-08

Applicant: Silicon Laboratories Inc.

Inventor： Carlos Jesus Briseno-Vidrios ,  Michael R. May ,  Patrick De Bakker ,  Fernando Naim Lavalle Aviles

IPC: H04L27/04 ,  H04L27/06 ,  H04L27/08

Abstract: An isolated gate driver includes a first input terminal to receive gate information and one or more input terminals to receive configuration information. A modulation circuit generates a modulated signal having four possible states, each of the four possible states corresponding to a different unique pair of values of the gate information and the configuration information. The modulation circuit represents two of the states using on-off keying (OOK) while the configuration information is at a first value and represents two of the states as a modification to the OOK modulation based on the configuration information being at a second value. The modulated signal is sent over an isolation communication channel coupling a transmitter and receiver of the isolated gate driver.