公开(公告)号：US20100177059A1

公开(公告)日：2010-07-15

申请号：US12652260

申请日：2010-01-05

Applicant: TSUN-MIN WANG ,  CHUN-YU LIN ,  TE-SHENG CHIU ,  CHUN-CHUNG HUANG

Inventor： TSUN-MIN WANG ,  CHUN-YU LIN ,  TE-SHENG CHIU ,  CHUN-CHUNG HUANG

IPC: G06F3/045

CPC classification number: G06F3/044 ,  H03K17/9622

Abstract: A sensing method and circuit for a capacitive touch panel sense the capacitance variation of a lateral capacitor formed at the intersection of two traces of the capacitive touch panel, to distinguish a real point from a ghost point. A sensing cycle includes two non-overlapping clock phases. In the first clock phase, the voltages across the lateral capacitor and across a sensing capacitor are set. In the second clock phase, the voltage at a first terminal of the lateral capacitor is changed, and a second terminal of the lateral capacitor is connected to a first terminal of the sensing capacitor, causing a voltage variation at a second terminal of the sensing capacitor. This voltage variation is used to determine whether the intersection is touched. The sensing method and circuit reflect the status of the lateral capacitor in real-time and prevent the location of the touch point from being misjudged.

Abstract translation: 用于电容式触摸屏的感测方法和电路检测形成在电容式触摸面板的两个迹线的交点处形成的横向电容器的电容变化，以将真实点与虚像点区分开。 感测周期包括两个不重叠的时钟相位。 在第一个时钟相位中，设置横向电容器两端的感测电容器两端的电压。 在第二时钟相位中，横向电容器的第一端子处的电压改变，并且横向电容器的第二端子连接到感测电容器的第一端子，导致感测电容器的第二端子处的电压变化 。 该电压变化用于确定交点是否被触摸。 感测方式和电路实时反映横向电容器的状态，防止接触点的位置误判。

公开(公告)号：US20100046239A1

公开(公告)日：2010-02-25

申请号：US12274195

申请日：2008-11-19

Applicant: CHUN-YU LIN ,  CHIA-CHUN CHANG

Inventor： CHUN-YU LIN ,  CHIA-CHUN CHANG

IPC: F21V29/00

CPC classification number: F21V15/01 ,  F21V29/15 ,  F21V29/507 ,  F21V29/83

Abstract: A lamp housing includes a top plate and sidewalls. The top plate includes a first edge, a second edge, a first group of top-plate dissipation slots and a plurality of second top-plate dissipation slots. The first edge is opposite to the second edge. Each top-plate dissipation slot has the same width, and is rectangular. Each one of the plurality of first top-plate dissipation slots is separated by two widths thereof, and each of the plurality of second top-plate dissipation slots is separated by two widths thereof. The plurality of first top-plate dissipation slots is parallel and 20 to 24 slot widths away from the first edge toward the center of the top plate, and the plurality of second dissipation slots is parallel and 14 to 18 slot widths away from the second edge. A plurality of sidewall dissipation slots is provided on the sidewalls.

Abstract translation: 灯壳体包括顶板和侧壁。 顶板包括第一边缘，第二边缘，第一组顶板耗散槽和多个第二顶板耗散槽。 第一边缘与第二边缘相对。 每个顶板散热槽的宽度相同，为矩形。 多个第一顶板散热槽中的每一个分开两个宽度，并且多个第二顶板散热槽中的每一个分开两个宽度。 多个第一顶板散热槽平行且距离第一边缘朝向顶板的中心的20至24个槽宽度，并且多个第二散热槽是平行的，并且距第二边缘的14至18个槽宽度 。 在侧壁上设置多个侧壁耗散槽。

公开(公告)号：US07582916B2

公开(公告)日：2009-09-01

申请号：US12013637

申请日：2008-01-14

Applicant: MIng-Dou Ker ,  Chun-Yu Lin ,  Chang-Tzu Wang

Inventor： MIng-Dou Ker ,  Chun-Yu Lin ,  Chang-Tzu Wang

IPC: H01L29/72

CPC classification number: H01L29/87 ,  H01L27/0262 ,  H01L29/0626 ,  H01L29/0692

Abstract: A silicon controlled rectifier structure of polygonal layouts is provided. The polygonal first conductive type doped region is located in the middle of the polygonal second conductive type well. The first conductive type well shaped as a polygonal ring surrounds the second conductive type well and the second conductive type doped region is located within the first conductive type well and shaped as a polygonal ring concentric to the first conductive type well.

Abstract translation: 提供了多边形布局的可控硅整流器结构。 多边形第一导电型掺杂区域位于多边形第二导电类型阱的中间。 良好成形为多边形环的第一导电类型围绕第二导电类型阱并且第二导电类型掺杂区域位于第一导电类型阱内并且形状为与第一导电类型阱同心的多边形环。

公开(公告)号：US20090179222A1

公开(公告)日：2009-07-16

申请号：US12013637

申请日：2008-01-14

Applicant: Ming-Dou Ker ,  Chun-Yu Lin ,  Chang-Tzu Wang

Inventor： Ming-Dou Ker ,  Chun-Yu Lin ,  Chang-Tzu Wang

IPC: H01L29/747

CPC classification number: H01L29/87 ,  H01L27/0262 ,  H01L29/0626 ,  H01L29/0692

Abstract: A silicon controlled rectifier structure of polygonal layouts is provided. The polygonal first conductive type doped region is located in the middle of the polygonal second conductive type well. The first conductive type well shaped as a polygonal ring surrounds the second conductive type well and the second conductive type doped region is located within the first conductive type well and shaped as a polygonal ring concentric to the first conductive type well.

Abstract translation: 提供了多边形布局的可控硅整流器结构。 多边形第一导电型掺杂区域位于多边形第二导电类型阱的中间。 良好成形为多边形环的第一导电类型围绕第二导电类型阱并且第二导电类型掺杂区域位于第一导电类型阱内并且形状为与第一导电类型阱同心的多边形环。

公开(公告)号：US20080218487A1

公开(公告)日：2008-09-11

申请号：US11778772

申请日：2007-07-17

Applicant: Chun-Chung Huang ,  Tsun-Min Wang ,  Tse-Chi Lin ,  Chun-Yu Lin

Inventor： Chun-Chung Huang ,  Tsun-Min Wang ,  Tse-Chi Lin ,  Chun-Yu Lin

IPC: G06F3/041

CPC classification number: G06F3/044

Abstract: A touch pad has a controller circuitry for generating an X-Y coordinate signal; a touch screen connecting with the controller circuitry, which has a transparent substrate and a transparent conductive film provided at the transparent substrate. The transparent conductive film having a plurality of capacitance sensors distributed along an X-coordinate direction and a Y-coordinate direction. The plurality of capacitance sensors are patterned for averaging the resistance capacitance distribution.

Abstract translation: 触摸板具有用于产生X-Y坐标信号的控制器电路; 与控制器电路连接的触摸屏，其具有设置在透明基板上的透明基板和透明导电膜。 所述透明导电膜具有沿着X坐标方向和Y坐标方向分布的多个电容式传感器。 对多个电容传感器进行图案化以平均电阻电容分布。

公开(公告)号：US07321629B2

公开(公告)日：2008-01-22

申请号：US10613419

申请日：2003-07-03

Applicant: Chih-Chun Feng ,  Yung-Hua Hung ,  Chih-Yaw Wang ,  Chun-Yu Lin

Inventor： Chih-Chun Feng ,  Yung-Hua Hung ,  Chih-Yaw Wang ,  Chun-Yu Lin

IPC: H04K1/10 ,  H04L27/08

CPC classification number: H04L1/0041 ,  H04L27/2617 ,  H04L27/2618 ,  H04L27/2621 ,  H04L27/2623

Abstract: A low-complexity and low-latency method and apparatus in multicarrier communication systems is used for protection and transmission of the side information related to peak-to-average power ratio (PAPR) reduction. The side information is encoded by an error-correction code and transmitted through a plurality of reserved sub-carriers. Modulation of the coded side information over the reserved sub-carriers is performed separately without re-performing data modulation. Therefore, the invention dramatically reduces implementation complexity. Determination of the related parameters for PAPR reduction can be based on the PAPR level of the data modulated signal with slight degradation in PAPR reduction performance or that of level of the transmitted signal with no degradation in PAPR reduction performance.

Abstract translation: 多载波通信系统中的低复杂度和低延迟的方法和装置用于与峰均功率比（PAPR）降低相关的辅助信息的保护和传输。 侧信息由纠错码编码并通过多个保留子载波进行发送。 在保留副载波上的编码侧信息的调制是分开执行的，而不执行数据调制。 因此，本发明大大降低了实现的复杂性。 减少PAPR的相关参数的确定可以基于PAPR降低性能稍微降低的数据调制信号的PAPR电平或PAPR降低性能下降的传输信号的电平。

公开(公告)号：US20070280086A1

公开(公告)日：2007-12-06

申请号：US11758018

申请日：2007-06-05

Applicant: Ming-Jiou Yu ,  Chun-Yu Lin ,  Kuo-Jung Lan ,  Kuan-Hua Chao ,  Chia-Wei Liao ,  Chih-Ching Chen ,  Shu-Hung Chou

Inventor： Ming-Jiou Yu ,  Chun-Yu Lin ,  Kuo-Jung Lan ,  Kuan-Hua Chao ,  Chia-Wei Liao ,  Chih-Ching Chen ,  Shu-Hung Chou

IPC: G11B7/00

CPC classification number: G11B7/1263 ,  G11B7/08505 ,  G11B7/0903

Abstract: A laser power control system and related method for reducing a settling time in a target laser power transition are disclosed. The laser power control system includes a state decision circuit, for generating a state decision signal according to a selected operational state of a target circuit; a plurality of buffers, for storing a plurality of control data corresponding to a plurality of candidate operational states of the target circuit respectively; and a multiplexer, coupled between the state decision circuit and the buffers, for coupling a selected buffer of the buffers and the target circuit according to the state decision signal for outputting a control datum stored in the selected buffer to the target circuit.

Abstract translation: 公开了一种用于减少目标激光功率转换中的建立时间的激光功率控制系统和相关方法。 激光功率控制系统包括状态判定电路，用于根据所选择的目标电路的操作状态产生状态判定信号; 多个缓冲器，用于分别存储对应于所述目标电路的多个候选操作状态的多个控制数据; 以及耦合在所述状态判定电路和所述缓冲器之间的多路复用器，用于根据用于将所选择的缓冲器中存储的控制数据输出到所述目标电路的所述状态判定信号来耦合所述缓冲器的选定缓冲器和所述目标电路。

公开(公告)号：US07069398B2

公开(公告)日：2006-06-27

申请号：US10600485

申请日：2003-06-20

Applicant: Chun-Yu Lin ,  Yung-Hua Hung ,  Chih-Chun Feng

Inventor： Chun-Yu Lin ,  Yung-Hua Hung ,  Chih-Chun Feng

IPC: G06F12/02 ,  H04J11/00

CPC classification number: H03M13/2796 ,  H03M13/2732 ,  H04L27/2608 ,  H04L27/2647

Abstract: An apparatus and method having a de-interleaving memory and a controller is used for de-interleaving interleaved data in a coded orthogonal frequency division multiplexing receiver. The controller generates the correct access addresses of the de-interleaving memory for the data to be de-interleaved, and controls the read and write operations to the de-interleaving memory. The controller comprises an address generator having a plurality of base address generators, and a read/write control circuitry. By using the de-interleaving memory combined with memory address computation for the interleaved data, frequency de-interleaving, block de-interleaving and time de-interleaving are performed in one-stage approach in the COFDM receiver. The memory size is reduced and the circuitry complexity for performing the de-interleaving process is relatively low.

Abstract translation: 具有解交织存储器和控制器的装置和方法被用于对经编码的正交频分多路复用接收机中的交错数据进行解交织。 控制器为要解交织的数据产生解交织存储器的正确访问地址，并且控制对解交织存储器的读和写操作。 控制器包括具有多个基地址发生器的地址发生器和读/写控制电路。 通过使用与交织数据的存储器地址计算结合的去交织存储器，在COFDM接收机中以一级方式执行频率去交织，块解交织和时间去交织。 存储器大小减小，并且用于执行解交织处理的电路复杂度相对较低。