公开(公告)号：US5677621A

公开(公告)日：1997-10-14

申请号：US375315

申请日：1995-01-18

Applicant: Klaas Bult ,  Godefridus J.G.M. Geelen

Inventor： Klaas Bult ,  Godefridus J.G.M. Geelen

IPC: H03M1/74 ,  G05F3/24 ,  G05F3/26 ,  H03F3/343 ,  G05F3/16

CPC classification number: G05F3/265 ,  G05F3/24 ,  G05F3/262

Abstract: A noise-insensitive device for generating a bias current includes a reference voltage source for supplying a reference voltage between a first reference terminal and a second reference terminal. A bias current generator generates the bias current in response to the reference voltage and includes a first and-a second input terminal coupled to the first and the second reference terminal via connecting wires which receive the reference voltage. A first and a second transistor arranged as a differential pair with the gate of the first transistor coupled to the first input terminal and the gate of the second transistor coupled to the second input terminal. The source of the first transistor and the source of the second transistor are coupled to one another at a common terminal for receiving a common current. Each of said transistors has a drain for supplying a first transistor current and a second transistor current, respectively, whose difference decreases when the common current increases. A converter is coupled to the first and the second transistor and has an output terminal for supplying a current which is proportional to the difference between the first transistor current and the second transistor current. A first current mirror has an input branch coupled to the output terminal of the converter. A second current mirror has an input branch coupled to an output branch of the first current mirror and an output branch coupled to the common terminal. The connecting wires do not carry current and interference as a result of cross-talk from other circuits coupled to the connecting wires is suppressed by the differential pair.

Abstract translation: 用于产生偏置电流的噪声不敏感装置包括用于在第一参考端和第二参考端之间提供参考电压的参考电压源。 偏置电流发生器响应于参考电压产生偏置电流，并且包括通过接收参考电压的连接线耦合到第一和第二参考端的第一和第二输入端。 第一和第二晶体管被配置为与耦合到第一输入端的第一晶体管的栅极和耦合到第二输入端的第二晶体管的栅极的差分对。 第一晶体管的源极和第二晶体管的源极在用于接收公共电流的公共端子处彼此耦合。 所述晶体管中的每一个分别具有用于提供第一晶体管电流和第二晶体管电流的漏极，其在公共电流增加时差异减小。 A转换器耦合到第一和第二晶体管，并且具有用于提供与第一晶体管电流和第二晶体管电流之间的差成比例的电流的输出端子。 第一电流镜具有耦合到转换器的输出端的输入支路。 第二电流镜具有耦合到第一电流镜的输出支路的输入支路和耦合到公共端子的输出支路。 连接线不会由于差分对而抑制与连接线耦合的其它电路的串扰而导致电流和干扰。

公开(公告)号：US5475331A

公开(公告)日：1995-12-12

申请号：US15190

申请日：1993-02-10

Applicant: Klaas Bult ,  Godefridus J. G. M. Geelen

Inventor： Klaas Bult ,  Godefridus J. G. M. Geelen

IPC: H03K17/693 ,  H03G1/00 ,  H03H11/24 ,  H03H11/36 ,  H03K17/00 ,  H03K17/62 ,  H03K17/687

CPC classification number: H03H11/245 ,  H03G1/007

Abstract: A current divider for linearly dividing a first signal current (Ii10) into a second and a third signal current (Io11, Io12) includes a first terminal (I10) for the passage of the first signal current (Ii10), a second terminal (O11) for the passage of the second signal current (Io11) and for receiving a first potential, a third terminal (O12) for the passage of the third signal current (Io12) and for receiving a second potential, a first MOS transistor (M1) having a control electrode and a main current path, and a second MOS transistor (M2) having a control electrode and a main current path, the control electrodes of the first and the second MOS transistor (M1, M2) being coupled to a first reference terminal (R10) for receiving a first reference voltage (Rv10) to realize a conductive state of the first and the second MOS transistor (M1, M2) during a first active state of the current divider, the main current path of the first MOS transistor (M1 ) being coupled between the first terminal (I10) and the second terminal (O11), and the main current path of the second MOS transistor (M2) being coupled between the first terminal (I10) and the third terminal (O12). The current divider effect a current division such that the dimensions of the MOS transistors used dictate the proportion of the respective signals currents realized by the current divider.

Abstract translation: 用于将第一信号电流（Ii10）线性分割成第二和第三信号电流（Io11，Io12）的电流分压器包括用于使第一信号电流（Ii10）通过的第一端子（I10），第二端子（O11） ）为了通过第二信号电流（Io11）并且用于接收第一电位，第三端子（O12）用于通过第三信号电流（Io12）并用于接收第二电位，第一MOS晶体管（M1） 具有控制电极和主电流路径，以及具有控制电极和主电流路径的第二MOS晶体管（M2），第一和第二MOS晶体管（M1，M2）的控制电极耦合到第一参考 端子（R10），用于在分压器的第一有效状态期间接收第一参考电压（Rv10）以实现第一和第二MOS晶体管（M1，M2）的导通状态，第一MOS晶体管的主电流路径 （M1）耦合在第一端子之间 （I10）和第二端子（O11），并且第二MOS晶体管（M2）的主电流路径耦合在第一端子（I10）和第三端子（O12）之间。 电流分压器实现电流分配，使得所使用的MOS晶体管的尺寸决定了由分流器实现的相应信号电流的比例。