Methods and configurations for improving the performance of sensors under a display

    公开(公告)号:US11495176B1

    公开(公告)日:2022-11-08

    申请号:US17203356

    申请日:2021-03-16

    Applicant: Apple Inc.

    Abstract: An electronic device may include a display and a sensor under the display. The display may include pixels having emission transistors that are controlled by emission signals. The emission signals are controlled using a pulse width modulation (PWM) scheme to control the brightness of the display. The emission signals may further include a localized sensor blackout pulse configured to generate a localized sensor blackout region that overlaps with the sensor to reduce any undesired back emission of light emitted from the display. The sensor blackout pulse may be automatically generated periodically or generated in an on-demand basis once per frame, multiple times per frame time, or once every multiple frames. Any luminance degradation caused by the sensor blackout pulse may be compensated by boosting the luminance and/or by extending the duration of each emission on pulse.

    Electronic devices with low refresh rate display pixels

    公开(公告)号:US11257426B2

    公开(公告)日:2022-02-22

    申请号:US17080685

    申请日:2020-10-26

    Applicant: Apple Inc.

    Abstract: A display may have an array of organic light-emitting diode display pixels operating at a low refresh rate. Each display pixel may have six thin-film transistors and one capacitor. One of the six transistors may serve as the drive transistor and may be compensated using the remaining five transistors and the capacitor. One or more on-bias stress operations may be applied before threshold voltage sampling to mitigate first frame dimming. Multiple anode reset and on-bias stress operations may be inserted during vertical blanking periods to reduce flicker and maintain balance and may also be inserted between successive data refreshes to improve first frame performance. Two different emission signals controlling each pixel may be toggled together using a pulse width modulation scheme to help provide darker black levels.

    High frame rate display
    87.
    发明授权

    公开(公告)号:US10984727B2

    公开(公告)日:2021-04-20

    申请号:US16120076

    申请日:2018-08-31

    Applicant: Apple Inc.

    Abstract: A display may have rows and columns of pixels. Gate lines may be used to supply gate signals to rows of the pixels. Data lines may be used to supply data signals to columns of the pixels. The data lines may include alternating even and odd data lines. Data lines may be organized in pairs each of which includes one of the odd data lines and an adjacent one of the even data lines. Demultiplexer circuitry may be configured dynamically during data loading and pixel sensing operations. During data loading, data from display driver circuitry may be supplied, alternately to odd pairs of the data lines and even pairs of the data lines. During sensing, the demultiplexer circuitry may couple a pair of the even data lines to sensing circuitry in the display driver circuitry and then may couple a pair of the odd data lines to the sensing circuitry.

    Displays with multiple scanning modes

    公开(公告)号:US10971074B2

    公开(公告)日:2021-04-06

    申请号:US16712050

    申请日:2019-12-12

    Applicant: Apple Inc.

    Abstract: An electronic device may include a display such as a light-emitting diode display. The electronic device may be a head-mounted device that provides a virtual reality or augmented reality environment to a user. To reduce artifacts in the display, a display may be operable in both a normal scanning mode and a partial scanning mode. In the normal scanning mode, every row of the display may be enabled to emit light in each frame. In the partial scanning mode, only a subset of the rows of the display may be enabled to emit light in each frame. The display may have a higher refresh rate in the partial scanning mode than in the normal scanning mode. To ensure uniform transistor stress across the display, the scanning driver for the display may scan the disabled rows in the partial scanning mode even though the rows will not be used to emit light.

    Electronic devices with low refresh rate display pixels

    公开(公告)号:US10854139B2

    公开(公告)日:2020-12-01

    申请号:US16696578

    申请日:2019-11-26

    Applicant: Apple Inc.

    Abstract: A display may have an array of organic light-emitting diode display pixels operating at a low refresh rate. Each display pixel may have six thin-film transistors and one capacitor. One of the six transistors may serve as the drive transistor and may be compensated using the remaining five transistors and the capacitor. One or more on-bias stress operations may be applied before threshold voltage sampling to mitigate first frame dimming. Multiple anode reset and on-bias stress operations may be inserted during vertical blanking periods to reduce flicker and maintain balance and may also be inserted between successive data refreshes to improve first frame performance. Two different emission signals controlling each pixel may be toggled together using a pulse width modulation scheme to help provide darker black levels.

    Electronic device having display circuitry with rounded corners

    公开(公告)号:US10797125B2

    公开(公告)日:2020-10-06

    申请号:US15985485

    申请日:2018-05-21

    Applicant: Apple Inc.

    Abstract: A display may have display driver circuitry. Signal routing lines may supply multiplexed signals from the display driver circuitry to demultiplexer circuitry. The demultiplexer circuitry may provide corresponding demultiplexed signals to the pixels over signal routing lines. The demultiplexer circuitry may have demultiplexer circuit blocks such as 1:N demultiplexer circuit blocks. Each of the demultiplexer circuit blocks may have the same area and layout. The demultiplexer circuit blocks may run across the width of the display. A first portion of the demultiplexer circuit blocks may extend in a straight line parallel to an edge of the active area. A second portion of the demultiplexer circuit blocks may be arranged in a staircase pattern that angles away from the first portion of demultiplexer circuit blocks.

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