Pixel driving circuit, pixel structure, and display panel

    公开(公告)号:US11869424B2

    公开(公告)日:2024-01-09

    申请号:US17415758

    申请日:2020-12-29

    Abstract: The present disclosure relates to the field of display technology, and proposes a pixel driving circuit, a pixel structure, and a display panel. The pixel driving circuit includes a plurality of driving transistors. For each driving transistor the first terminal is connected to a first power terminal, the second terminal is connected to a first node, and the control terminal is connected to a second node, so as to input current to the first node under the effect of the voltage at the second node. The low pixel density area of the display panel can be provided with the above-mentioned pixel driving circuit, so that the brightness difference between the low pixel density area and the high pixel density area can be avoided.

    DISPLAY SUBSTRATE, DISPLAY PANEL, AND ELECTRONIC DEVICE

    公开(公告)号:US20230371319A1

    公开(公告)日:2023-11-16

    申请号:US18223660

    申请日:2023-07-19

    Inventor: Libin Liu Qian Yang

    CPC classification number: H10K59/126 H10K59/1213 H10K59/131 H01L27/124

    Abstract: The present disclosure provides a display substrate, a display panel including the display substrate, and an electronic device. The display substrate includes: a base substrate; a transistor on the base substrate, wherein the transistor includes a first gate layer; a signal line located on the base substrate and configured to transmit an electrical signal; and a conductive isolation portion located between the transistor and the signal line adjacent to the transistor in a direction parallel to the base substrate, wherein the conductive isolation portion is electrically connected with a DC source signal on the display substrate.

    Pixel circuit, pixel driving method and display device

    公开(公告)号:US11605341B2

    公开(公告)日:2023-03-14

    申请号:US17424478

    申请日:2021-01-05

    Abstract: The present disclosure provides a pixel circuit, a pixel driving method and a display device. The pixel circuit includes a driving circuit, an energy storage circuit and a switch control circuit. A first end of the energy storage circuit is coupled to a control end of the driving circuit, a second end of the energy storage circuit is coupled to a first end of the driving circuit via the switch control circuit, and the energy storage circuit is configured to store a voltage. The switch control circuit is configured to control the second end of the energy storage circuit to be electrically coupled to a voltage application end or the first end of the driving circuit under the control of a light-emission control signal from a light-emission control line. The driving circuit is configured to generate a driving current in accordance with a voltage between the control end and first end of the driving circuit.

    Gate driving unit, gate driving method, gate driving circuitry and display device

    公开(公告)号:US11328642B2

    公开(公告)日:2022-05-10

    申请号:US17044148

    申请日:2020-03-18

    Abstract: The present disclosure provides a gate driving unit, a gate driving method, a gate driving circuitry and a display device. The gate driving unit includes a reverse-phase gate driving signal output end, a normal-phase gate driving signal output end, an input circuitry, an output control circuitry, an input node control circuitry and an output circuitry. The input circuitry is configured to control an input end to be electrically connected to an input node under the control of a first clock signal. The output control circuitry is configured to control a potential at an output node under the control of a potential at the input node and a second clock signal. The input node control circuitry is configured to control the potential at the input node in accordance with the potential at the output node under the control of the second clock signal. The output circuitry is configured to output a reverse-phase gate driving signal and output a normal-phase gate driving signal in accordance with the potential at the output node.

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