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公开(公告)号:US10168719B2
公开(公告)日:2019-01-01
申请号:US15852330
申请日:2017-12-22
Inventor: Xuehuan Feng , Pan Xu , Yongqian Li , Zhongyuan Wu
Abstract: The present invention provides a digital low dropout regulator and a control method thereof. The regulator comprises a voltage comparator, a counter, a decoder, a PMOSFET array and a divider. The voltage comparator receives an actual voltage output from the PMOSFET array through the positive input terminal, receives a reference voltage through the negative input terminal, and compares the actual voltage and the reference voltage to obtain a level signal. The divider calculates based on an output voltage pre-configured for a PMOSFET array and an actual voltage output by the PMOSFET array in at least two clock cycles to obtain a first value. The counter generates a control signal based on the level signal and the first value. The decoder receives the control signal transmitted by the counter and controlling the number of switched-on transistors, in the PMOSFET on a basis of the control signal.
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公开(公告)号:US12250843B2
公开(公告)日:2025-03-11
申请号:US17761537
申请日:2021-05-20
Applicant: BOE Technology Group Co., Ltd.
Inventor: Xuefei Sun , Jaegeon You , Xing Zhang , Yicheng Lin , Pan Xu , Ying Han , Guoying Wang , Zhan Gao
IPC: H10K50/854 , H10K71/00 , H10K59/12
Abstract: The present disclosure provides a transparent display device, a simulation method, and a manufacturing method. The transparent display device includes a base substrate and a plurality of pixels arranged in an array form on the base substrate. Each pixel includes a transparent region and a display region, and a scattering structure for scattering light is arranged along a boundary between the transparent region and the display region.
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公开(公告)号:US12245471B2
公开(公告)日:2025-03-04
申请号:US17788387
申请日:2021-08-04
Applicant: BOE Technology Group Co., Ltd.
Inventor: Ying Han , Yicheng Lin , Ling Wang , Guoying Wang , Xing Zhang , Zhan Gao , Pan Xu
IPC: H01L27/14 , H01L27/12 , H10K50/86 , H10K59/121 , H10K59/13 , H10K59/131
Abstract: The display substrate includes: a substrate; a plurality of pixel units on the substrate, each pixel unit includes a plurality of sub-pixels, each sub-pixel includes a light-emitting element and a pixel drive circuit; a photosensitive circuit on the substrate; a first conductive film layer on the substrate. The pixel drive circuit includes a drive transistor, a gate electrode of the drive transistor is located on a side of a drive active layer away from the substrate, an orthographic projection of the gate electrode of the drive transistor on the substrate at least partially overlaps an orthographic projection of the drive active layer on the substrate. The first conductive film layer includes a first light-shielding portion between the substrate and the drive active layer, and an orthographic projection of the first light-shielding portion on the substrate at least partially overlaps the orthographic projection of the drive active layer on the substrate.
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公开(公告)号:US12193290B2
公开(公告)日:2025-01-07
申请号:US17629772
申请日:2021-04-30
Inventor: Yuanjie Xu , Benlian Wang , Lili Du , Zhenhua Zhang , Yuxin Zhang , Pan Xu
IPC: H01L21/56 , G09G3/3233 , H10K59/12 , H10K59/121 , H10K59/131 , H10K59/35
Abstract: Provided are a display substrate, a preparation method thereof, and a display device. The display substrate includes a display region and a bonding region on one side of the display region. The bonding region at least includes a lead area; the display region includes a plurality of data lines and a plurality of data fanout lines, the lead area includes a plurality of lead wires, and orthographic projections of the plurality of data lines and the plurality of data fanout lines on a plane of the display substrate are at least partially overlapped. At least one lead wire is connected to the data line through the data fanout line. In the lead area, an orthographic projection of any one of the lead wires on the plane of the display substrate and orthographic projections of other lead wires on the plane of the display substrate have no overlap region.
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公开(公告)号:US12082436B2
公开(公告)日:2024-09-03
申请号:US17279771
申请日:2020-06-02
Applicant: BOE Technology Group Co., Ltd.
Inventor: Xing Zhang , Wei Quan , Yicheng Lin , Pan Xu , Ling Wang , Guoying Wang , Ying Han , Zhan Gao
IPC: H10K50/824 , H10K50/828 , H10K59/12 , H10K59/122 , H10K71/00
CPC classification number: H10K50/824 , H10K50/828 , H10K59/122 , H10K71/00 , H10K59/1201
Abstract: The present disclosure provides a display substrate, including: a base substrate, which includes a display region and a driving region arranged on at least one side of the display region; a first electrode layer disposed in the display region; a signal output part disposed in the driving region, the first electrode layer is electrically coupled to the signal output part, the first electrode layer comprises a plurality of electrode regions each having a same area; and a plurality of auxiliary electrodes, which are in one-to-one correspondence with the plurality of electrode regions and configured to be coupled in parallel with the first electrode layer, a resistance of each auxiliary electrode is inversely correlated with a minimum distance from the electrode region corresponding to said each auxiliary electrode to the signal output part. The present disclosure further provides a display panel and a manufacturing method thereof and a display device.
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公开(公告)号:US12075664B2
公开(公告)日:2024-08-27
申请号:US16971673
申请日:2019-11-04
Applicant: BOE Technology Group Co., Ltd.
Inventor: Guoying Wang , Yicheng Lin , Ling Wang , Zhen Song , Pan Xu , Xing Zhang , Ying Han , Zhan Gao
IPC: H10K59/13 , H10K59/12 , H10K59/121 , H10K59/124 , H10K59/126 , H10K59/131 , H10K59/38
CPC classification number: H10K59/13 , H10K59/1213 , H10K59/124 , H10K59/126 , H10K59/131 , H10K59/38 , H10K59/1201
Abstract: A display substrate having a plurality of subpixels is provided. A respective one of the plurality of subpixels includes a light emitting element; a first thin film transistor configured to driving light emission of the light emitting element; and a light emitting brightness value detector. The light emitting brightness value detector includes a second thin film transistor; and a photosensor electrically connected to the second thin film transistor and configured to detect a light emitting brightness value. The display substrate further includes a silicon organic glass layer on a side of at least one of the first thin film transistor or the second thin film transistor away from a base substrate; and the photosensor is on a side of the silicon organic glass layer away from the base substrate.
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公开(公告)号:US20240155893A1
公开(公告)日:2024-05-09
申请号:US18261880
申请日:2022-09-06
Applicant: BOE Technology Group Co., Ltd.
Inventor: Ying Han , Pan Xu , Xing Zhang , Chengyuan Luo , Donghui Zhao , Mingi Chu
IPC: H10K59/131 , G09G3/3233
CPC classification number: H10K59/131 , G09G3/3233 , G09G2300/0408 , G09G2300/0426 , G09G2300/0452 , G09G2300/0819 , G09G2300/0852 , G09G2310/08 , G09G2320/0233
Abstract: A display substrate includes: a base substrate, a plurality of pixel units and a plurality of initialization voltage signal lines. The pixel units are arranged in an array to form a plurality of rows of pixel units and a plurality of columns of pixel units, at least one pixel unit includes sub-pixels, and at least one sub-pixel includes a light-emitting element and a pixel driving circuit. The initialization voltage signal lines are configured to provide initialization voltage signals to the plurality of rows of pixel units respectively, and are arranged at intervals along a second direction. At least one initialization voltage signal line extends along a first direction. The plurality of rows of pixel units include a (2n−1)th row and a 2nth row and pixel driving circuits of the (2n−1)th row and pixel driving circuits of the 2nth rows share a common initialization voltage signal line.
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88.
公开(公告)号:US11935469B2
公开(公告)日:2024-03-19
申请号:US17620195
申请日:2020-12-23
Inventor: Xuehuan Feng , Yongqian Li , Pan Xu , Zhongyuan Wu
IPC: G09G3/3275 , G09G3/3233 , G09G3/3266
CPC classification number: G09G3/3233 , G09G3/3266 , G09G2300/0426 , G09G2300/0842 , G09G2300/0861 , G09G2320/0233 , G09G2320/0257
Abstract: A pixel circuit array, a display panel, a method for driving a pixel circuit array, and a method for driving a display panel are provided. The pixel circuit array may include: a first signal sensing line (SENSE1) and a second signal sensing line (SENSE2); and N pixel circuits arranged in a column. All of the N pixel circuits are divided into a first group and a second group, each pixel circuit in the first group is coupled to the first signal sensing line (SENSE1), and each pixel circuit in the second group is coupled to the second signal sensing line (SENSE2) different from the first signal sensing line (SENSE1), where N is a positive integer greater than 1.
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公开(公告)号:US20240038142A1
公开(公告)日:2024-02-01
申请号:US18042342
申请日:2022-05-31
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Ying Han , Pan Xu , Xing Zhang , Chengyuan Luo , Donghui Zhao
CPC classification number: G09G3/32 , H01L27/124 , G09G2300/0842 , G09G2310/0262 , G09G2300/0408 , G09G2320/02 , G09G2310/08 , H01L27/1222
Abstract: A display panel includes: a plurality of pixel circuits arranged on base substrate, at least one pixel circuit includes a drive transistor and a first switch transistor; an active layer arranged on base substrate and including a first active portion and a second active portion, the first active portion is configured to form a channel portion of the drive transistor, the second active portion is configured to form a second electrode connection portion of the first switch transistor; and a first conductive layer arranged on a side of the active layer away from the base substrate, the first conductive layer includes a first conductive portion, a portion of the first conductive portion is used to form a gate electrode of the drive transistor, another portion is electrically connected to the second active portion and a channel length of the channel portion of the drive transistor is greater than a channel width.
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90.
公开(公告)号:US11887527B2
公开(公告)日:2024-01-30
申请号:US17921585
申请日:2021-05-12
Applicant: BOE Technology Group Co., Ltd.
Inventor: Pan Xu , Yicheng Lin , Guoying Wang , Xing Zhang , Ying Han , Zhan Gao , Dacheng Zhang
CPC classification number: G09G3/2092 , G09F9/30 , G09G3/20 , G09G2300/0426 , G09G2300/0439 , G09G2310/0267 , G09G2320/0223
Abstract: A special-shaped display panel includes: a special-shaped display area (S) having gate lines (G), some of the gate lines (G) being cut off in a non-display sub-area (S2) of the special-shaped display area (S); a first gate drive circuit set (A1) located on one side of the special-shaped display area (S), electrically connected to one ends of gate lines (G) which are not cut off by the non-display sub-area (S2), and electrically connected to gate lines (G) on one side which are cut off by the non-display sub-area (S2); and a second gate drive circuit set (A2) located on the other side of the special-shaped display area (S), electrically connected to the other ends of gate lines (G) which are not cut off by the non-display sub-area (S2), and electrically connected gate lines (G) on the other side which are cut off by the non-display sub-area (S2).
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