公开(公告)号：US20050157544A1

公开(公告)日：2005-07-21

申请号：US10761003

申请日：2004-01-20

申请人： Tai Min ,  Cheng Horng ,  Po Wang

发明人： Tai Min ,  Cheng Horng ,  Po Wang

IPC分类号： H01L27/105 ,  G11C11/14 ,  G11C11/16 ,  H01L21/8246 ,  H01L27/22 ,  H01L31/062 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12

CPC分类号： H01L43/08 ,  B82Y25/00 ,  B82Y40/00 ,  G11C11/161 ,  H01F10/3218 ,  H01F10/3272 ,  H01F41/307 ,  H01L43/12

摘要： A method of forming an MTJ memory cell and/or an array of such cells is provided wherein each such cell has a small circular horizontal cross-section of 1.0 microns or less in diameter and wherein the ferromagnetic free layer of each such cell has a magnetic anisotropy produced by a magnetic coupling with a thin antiferromagnetic layer that is formed on the free layer. The MTJ memory cell so provided is far less sensitive to shape irregularities and edge defects than cells of the prior art.

摘要翻译： 提供了形成MTJ存储器单元和/或这种单元阵列的方法，其中每个这样的单元具有直径为1.0微米或更小的小的圆形水平横截面，并且其中每个这样的单元的铁磁自由层具有磁性 通过与形成在自由层上的薄的反铁磁层的磁耦合产生的各向异性。 如此提供的MTJ存储单元对于形状不规则和边缘缺陷的敏感性远低于现有技术的单元。

公开(公告)号：US20070281427A1

公开(公告)日：2007-12-06

申请号：US11891923

申请日：2007-08-14

申请人： Wei Cao ,  Chyu-Jiuh Torng ,  Cheng Horng ,  Ruying Tong ,  Chen-Jung Chien ,  Liubo Hong

发明人： Wei Cao ,  Chyu-Jiuh Torng ,  Cheng Horng ,  Ruying Tong ,  Chen-Jung Chien ,  Liubo Hong

IPC分类号： H01L21/336

CPC分类号： H01L43/12 ,  H01L27/228

摘要： A method to fabricate an MTJ device and its connections to a CMOS integrated circuit is described. The device is built out of three layers. The bottom layer serves as a seed layer for the center layer, which is alpha tantalum, while the third, topmost, layer is selected for its smoothness, its compatibility with the inter-layer dielectric materials, and its ability to protect the underlying tantalum.

摘要翻译： 描述了制造MTJ器件及其与CMOS集成电路的连接的方法。 该设备由三层构建。 底层用作中心层的种子层，其为α钽，而第三最顶层选择为其平滑度，其与层间电介质材料的相容性以及其保护下面的钽的能力。

公开(公告)号：US07265404B2

公开(公告)日：2007-09-04

申请号：US11215276

申请日：2005-08-30

申请人： Wei Cao ,  Chyu-Jiuh Torng ,  Cheng Horng ,  Ruying Tong ,  Chen-Jung Chien ,  Liubo Hong

发明人： Wei Cao ,  Chyu-Jiuh Torng ,  Cheng Horng ,  Ruying Tong ,  Chen-Jung Chien ,  Liubo Hong

IPC分类号： H01L29/76

CPC分类号： H01L43/12 ,  H01L27/228

摘要： A structure that is well suited to connecting an MTJ device to a CMOS integrated circuit is described. It is built out of three layers. The bottom layer serves as a seed layer for the center layer, which is alpha tantalum, while the third, topmost, layer is selected for its smoothness, its compatibility with the inter-layer dielectric materials, and its ability to protect the underlying tantalum. A method for its formation is also described.

摘要翻译： 描述了非常适合于将MTJ设备连接到CMOS集成电路的结构。 它由三层构建。 底层用作中心层的种子层，其为α钽，而第三最顶层选择为其平滑度，其与层间电介质材料的相容性以及其保护下面的钽的能力。 还描述了其形成方法。