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81.发明授权Using a measured error to determine coefficients to provide to an equalizer to use to equalize an input signal 失效使用测量误差来确定提供给均衡器的系数以用于均衡输入信号公开(公告)号：US07436615B2
公开(公告)日：2008-10-14
申请号：US11298386
申请日：2005-12-08
IPC分类号： G11B5/35
CPC分类号： G11B5/09 , G11B5/00817 , G11B20/10009 , G11B20/10046
摘要： Provided are a read channel, storage drive and method using a measured error to determine coefficients to provide to an equalizer to use to equalize an input signal. A read channel is incorporated in a storage device to process signals read from a storage medium. An equalizer uses coefficients to equalize input read signals to produce equalizer output signals. A detector processes adjusted equalizer output signals to determine output values comprising data represented by the input read signals. An equalizer adaptor is enabled to provide a reference measured error and coefficients used to produce the adjusted equalizer signals that are associated with the reference measured error. The equalizer adaptor computes new equalizer coefficients to use to equalize input read signals that result in a new measured error from the detector and computes a new measured error for the new equalizer coefficients. The equalizer adaptor determines whether the new measured error is degraded with respect to the reference measured error and saves the new equalizer coefficients and the new measured error in response to determining that the new measured error is not degraded with respect to the reference measured error. The equalizer adaptor provides the equalizer coefficients associated with the reference measured error to the equalizer to use to equalize input read signals in response to determining that the new measured error is degraded with respect to the reference measured error.
摘要翻译： 提供了读通道，存储驱动器和使用测量误差的方法来确定提供给均衡器的系数以用于均衡输入信号。 读取通道并入存储装置中以处理从存储介质读取的信号。 均衡器使用系数来均衡输入读取信号以产生均衡器输出信号。 检测器处理经调整的均衡器输出信号以确定包括由输入读信号表示的数据的输出值。 启用均衡器适配器以提供参考测量误差和用于产生与参考测量误差相关联的经调整的均衡器信号的系数。 均衡器适配器计算新的均衡器系数以用于均衡来自检测器的导致新的测量误差的输入读取信号，并且计算新的均衡器系数的新的测量误差。 均衡器适配器确定新的测量误差是否相对于参考测量误差降级，并且响应于确定新的测量误差相对于参考测量误差而不降级而保存新的均衡器系数和新的测量误差。 均衡器适配器将与参考测量误差相关联的均衡器系数提供给均衡器以用于响应于确定新的测量误差相对于参考测量误差而降级来均衡输入读取信号。
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82.发明授权Magnetic tape read channel signal values developed employing intermediate bits of the path memory of a PRML viterbi detector 失效使用PRML维特比检测器的路径存储器的中间位开发的磁带读取通道信号值公开(公告)号：US07430084B2
公开(公告)日：2008-09-30
申请号：US11003316
申请日：2004-12-03
IPC分类号： G11B5/09
CPC分类号： G11B20/10009 , G11B20/10037 , G11B20/10055 , G11B20/10074 , G11B20/10296 , G11B2220/90
摘要： Magnetic tape read channel signal values are developed employing intermediate bits of the path memory of a PRML Viterbi detector. Identification logic identifies a most likely path memory state of the PRML Viterbi detector from the path metrics of the PRML Viterbi detector. An intermediate bit sequence of the identified most likely path memory state is obtained, the intermediate bit sequence extending from an initiation point of the path memory which is intermediate the output and the input of the PRML Viterbi detector. A sample value is determined which corresponds to the obtained intermediate bit sequence.
摘要翻译： 使用PRML维特比检测器的路径存储器的中间位来开发磁带读取通道信号值。 识别逻辑根据PRML维特比检测器的路径度量来识别PRML维特比检测器的最可能的路径存储状态。 获得所识别的最可能的路径存储器状态的中间比特序列，从位于PRML维特比检测器的输出和输入之间的路径存储器的起始点延伸的中间比特序列。 确定对应于获得的中间位序列的采样值。
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83.发明申请APPARATUS, SYSTEM, AND METHOD FOR DETECTING A PERIODIC SEQUENCE OF SERVO SIGNALS 有权用于检测伺服信号周期性序列的装置，系统和方法公开(公告)号：US20080055759A1
公开(公告)日：2008-03-06
申请号：US11469133
申请日：2006-08-31
申请人： Nhan Xuan Bui , Roy Daron Cideciyan , Robert Allen Hutchins , Thomas Mittelholzer , Kazuhiro Tsuruta
发明人： Nhan Xuan Bui , Roy Daron Cideciyan , Robert Allen Hutchins , Thomas Mittelholzer , Kazuhiro Tsuruta
IPC分类号： G11B5/09
CPC分类号： G11B20/1407 , G11B5/584 , G11B20/1492 , G11B2020/1284 , G11B2020/1484 , G11B2220/90
摘要： An apparatus, system, and method are disclosed for detecting a periodic sequence. A value detector module detects a plurality of values of a periodic sequence. In one embodiment, a transformation module transforms the plurality of values into transformed values. A confinement module confines the values to a limited set of confined values. A correlation module correlates the confined values with a plurality of instances of the periodic sequence. In addition, a selection module selects an instance of the periodic sequence with the highest correlation to the confined values as an observed periodic sequence.
摘要翻译： 公开了用于检测周期性序列的装置，系统和方法。 值检测器模块检测周期性序列的多个值。 在一个实施例中，变换模块将多个值转换为变换值。 限制模块将值限制为有限的一组限制值。 相关模块将约束值与周期性序列的多个实例相关联。 此外，选择模块选择具有与限定值的最高相关性的周期性序列的实例作为观察到的周期性序列。
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公开(公告)号：US06526104B1
公开(公告)日：2003-02-25
申请号：US09282419
申请日：1999-03-31
IPC分类号： H04L2706
CPC分类号： G11B20/10055 , G11B7/00 , G11B20/10009 , G11B2020/10879
摘要： A maximum likelihood detector and a method for maximum likelihood detection of digital samples of channel output of data recorded as analog signals representing a finite number of states. The method comprises, first, programming at least two numerical metric coefficients. The coefficients are respectively applied to each sequential digital sample to generate alternative metrics, and each respective alternative metric is compared to a previous metric based on a previous digital sample. Based on the comparison, one of a plurality of provided metrics is selected which minimizes the mean squared error with respect to the previous metric. Then, the one of the finite number of states represented by the selected metric is identified, and a maximum likelihood path memory is set to a maximum likelihood state dictated by the identified one of the finite states, thereby detecting the recorded analog signals.
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公开(公告)号：US06246733B1
公开(公告)日：2001-06-12
申请号：US09081607
申请日：1998-05-20
IPC分类号： H04L700
CPC分类号： H04L7/0029 , G11B20/10055 , G11B20/1426 , H04L7/0334
摘要： A synchronous interface is provided for an asynchronous channel, for example, a read channel for a variable velocity magnetic tape, the channel providing asynchronous samples of an input signal from a fixed clock. The input signal, for example, comprises PRML data, written based upon synchronous write clock boundaries. The synchronous interface of the invention presents estimated synchronous samples at estimated write clock boundaries to allow decoding of the input signal. A phase estimator is coupled to the asynchronous channel for estimating the timing offset of the input signal synchronous write clock boundaries from the asynchronous samples. A sample estimator is coupled to the asynchronous channel and to the phase estimator for estimating, from two sequential asynchronous samples bounding an input signal synchronous write clock boundary, the input signal amplitudes at the estimated timing offset from the asynchronous samples. Thus, the estimated input signal amplitudes are substantially synchronized with the input signal synchronous write clock boundaries.
摘要翻译： 提供了用于异步通道的同步接口，例如用于可变速度磁带的读通道，该通道提供来自固定时钟的输入信号的异步采样。 输入信号例如包括基于同步写入时钟边界写入的PRML数据。 本发明的同步接口在估计的写时钟边界处呈现估计的同步采样，以允许解码输入信号。 相位估计器耦合到异步通道，用于估计来自异步采样的输入信号同步写时钟边界的定时偏移。 样本估计器耦合到异步信道和相位估计器，用于从限定输入信号同步写时钟边界的两个顺序异步样本估计来自异步采样的估计定时偏移处的输入信号幅度。 因此，估计的输入信号幅度基本上与输入信号同步写时钟边界同步。
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86.发明授权
公开(公告)号：US5978335A
公开(公告)日：1999-11-02
申请号：US672862
申请日：1996-06-28
IPC分类号： G01M11/00 , G11B7/00 , G11B7/0037 , G11B7/004 , G11B7/0045 , G11B7/005 , G11B7/09 , G11B7/125 , G11B11/10 , G11B11/105 , G11B20/10 , G11B20/18 , G11B27/36
CPC分类号： G11B7/126 , G11B11/10595 , G11B20/1879 , G11B27/36 , G11B7/0045 , G11B7/0037
摘要： An integrated calibration apparatus operates in multiple calibration modes of a multi-mode information storage system such as an optical disk drive to calibrate the drive in the multiple write modes. An event processing and measurement circuit is configurable in multiple configurations that each correspond to a different calibration measurement. Each configuration concurrently measures one or more parameters of readback data written to an optical disk by the optical disk drive operating in a particular write mode. A qualification circuit selects valid measurements for two different parameters or for two different qualification of the same parameter. A summation circuit sums valid measurements of each parameter measured and counts the number of measurements summed for each parameter. The calibration apparatus calculates average values for the measured parameters from the sums and counts, and then calibrates the multi-mode optical disk drive for its current write mode based on the average values.
摘要翻译： 集成校准装置在诸如光盘驱动器的多模式信息存储系统的多个校准模式中操作，以校准多个写入模式中的驱动器。 事件处理和测量电路可配置为多个配置，每个配置对应于不同的校准测量。 每个配置同时测量由特定写入模式操作的光盘驱动器写入光盘的回读数据的一个或多个参数。 鉴定电路为两个不同的参数或相同参数的两个不同资格选择有效的测量。 求和电路对所测量的每个参数的有效测量进行求和，并对每个参数求和的测量次数进行计数。 校准装置根据总和和计数计算测量参数的平均值，然后基于平均值校准多模光盘驱动器的当前写入模式。
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87.发明授权
公开(公告)号：US5920438A
公开(公告)日：1999-07-06
申请号：US116037
申请日：1998-07-15
CPC分类号： G11B20/10203 , G11B20/10037 , G11B5/09 , G11B7/005
摘要： Disclosed are a programmable digital device and method for generating tracking threshold signals for qualification of input peak signals in response to programmed digital gain signals which control the rate at which the envelope of the qualified input peak signals is followed, and in response to a programmed digital attenuation signal which determines the proportion of the peak envelope at which to generate new tracking threshold signals. The programmable digital device and method also provide a programmed clamp signal to clamp the positive and negative threshold signals to not fall below the programmed values. An anti-hang capability is provided to allow the thresholds to drop after a programmed time period during which no signal is detected. In an alternative arrangement, the centerline of the envelope is followed and used as the threshold.
摘要翻译： 公开了一种可编程数字装置和方法，用于响应于编程的数字增益信号产生用于对输入峰值信号进行鉴定的跟踪阈值信号，编程的数字增益信号控制遵循合格的输入峰值信号的包络的速率，并且响应于编程的数字 衰减信号，其确定产生新的跟踪阈值信号的峰值包络的比例。 可编程数字设备和方法还提供编程的钳位信号，以将正和负阈值信号钳位到不低于编程值。 提供防挂能力，以允许在没有检测到信号的编程时间段之后阈值下降。 在替代方案中，信封的中心线被跟随并用作阈值。
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88.发明授权Configurable read detection channel and method for decoding data stored within a data storage medium 失效用于对存储在数据存储介质中的数据进行解码的可配置读取检测通道和方法
公开(公告)号：US5825744A
公开(公告)日：1998-10-20
申请号：US647490
申请日：1996-05-13
摘要： In a first embodiment, a read detection channel includes a tracking threshold circuit for generating a variable threshold signal and a detection circuit, which is configurable in a number of diverse configurations that each correspond to one of the multiple diverse data formats. In addition, the first embodiment of the read detection channel includes a configuration circuit that automatically selects one of the configurations of the data detection circuit in response to a detection of a format of the input data stream. The first embodiment of the read detection channel permits data bits encoded in multiple diverse data formats to be decoded utilizing a single configurable read detection channel. In a second embodiment, the configurable read detection channel includes a tracking threshold circuit that can be configured to generate a threshold output signal in response to an input signal or in response to the input signal and a phase error signal. The second embodiment of the read detection channel further includes a detection circuit, which indicates data bits detected within the input signal in response to the threshold output signal, and at least one phase-locked loop coupled to the detection circuit, which places each detected data bit within one of a plurality of bit cells within an output data stream. The phase-locked loop also generates a phase error signal that can be selectively coupled to the tracking threshold circuit.
摘要翻译： 在第一实施例中，读取检测通道包括用于产生可变阈值信号的跟踪阈值电路和检测电路，其可配置为多个不同配置，每个配置各自对应于多种不同数据格式之一。 此外，读取检测通道的第一实施例包括配置电路，其响应于检测到输入数据流的格式而自动选择数据检测电路的配置之一。 读取检测通道的第一实施例允许使用单个可配置读取检测通道对以多种不同数据格式编码的数据位进行解码。 在第二实施例中，可配置读检测通道包括跟踪阈值电路，其可被配置为响应于输入信号或响应于输入信号和相位误差信号而产生阈值输出信号。 读取检测通道的第二实施例还包括检测电路，其响应于阈值输出信号指示在输入信号内检测到的数据位，以及耦合到检测电路的至少一个锁相环，其将每个检测到的数据 位在输出数据流内的多个位单元之一内。 锁相环还产生可以选择性地耦合到跟踪阈值电路的相位误差信号。
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公开(公告)号：US5802031A
公开(公告)日：1998-09-01
申请号：US972467
申请日：1997-11-18
IPC分类号： G11B7/00 , G11B7/0045 , G11B7/125
CPC分类号： G11B7/126 , G11B7/0045
摘要： A programmable writing system for an optical disk drive which is adaptable for pulse position modulation (PPM) and pulse width modulation (PWM) pulse generation. The writing circuit is responsive to a PPM/PWM mode command for generating programmed laser pulse signals. Specifically, a pattern detector is responsive to the PPM/PWM mode command for detecting input data. The detected data is provided to a pulse selector for selecting programmed pulse power and/or duration values, which operate a pulse generator to set pulse power levels and/or to set the duration of the generated laser pulse signals. In PWM mode, the pattern detector provides a toggle signal with each detected signal and the pulse selector responds to the toggle signal to alternate between providing mark pulse power and/or duration values and providing space duration values to thereby provide alternating mark and space signals.
摘要翻译： 一种适用于脉冲位置调制（PPM）和脉冲宽度调制（PWM）脉冲生成的光盘驱动器的可编程写入系统。 写入电路响应于用于产生编程的激光脉冲信号的PPM / PWM模式命令。 具体地，图案检测器响应于用于检测输入数据的PPM / PWM模式命令。 所检测的数据被提供给脉冲选择器，用于选择编程的脉冲功率和/或持续时间值，其操作脉冲发生器以设置脉冲功率电平和/或设置所产生的激光脉冲信号的持续时间。 在PWM模式中，模式检测器提供与每个检测到的信号的触发信号，并且脉冲选择器响应于触发信号以在提供标记脉冲功率和/或持续时间值之间交替，并提供空间持续时间值，从而提供交替的标记和空间信号。
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