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公开(公告)号：US20230412840A1
公开(公告)日：2023-12-21
申请号：US18242747
申请日：2023-09-06
Inventor： Chong Soon LIM , Han Boon TEO , Takahiro NISHI , Tadamasa TOMA , Ru Ling LIAO , Sughosh Pavan SHASHIDHAR , Hai Wei SUN
IPC: H04N19/597 , H04N19/46 , H04N19/159 , H04N19/176 , G06T5/00
CPC classification number: H04N19/597 , H04N19/46 , H04N19/159 , H04N19/176 , G06T5/006 , H04N19/85
Abstract: An encoder capable of properly handling an image to be encoded or decoded includes processing circuitry and memory connected to the processing circuitry. Using the memory, the processing circuitry: obtains parameters including at least one of (i) one or more parameters related to a first process for correcting distortion in an image captured with a wide angle lens and (ii) one or more parameters related to a second process for stitching a plurality of images; generates an encoded image by encoding a current image to be processed that is based on the image or the plurality of images; and writes the parameters into a bitstream including the encoded image.
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公开(公告)号：US20230262255A1
公开(公告)日：2023-08-17
申请号：US18136561
申请日：2023-04-19
Inventor： Chong Soon LIM , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Ru Ling LIAO , Jing Ya LI , Tadamasa TOMA , Takahiro NISHI , Kiyofumi ABE , Ryuichi KANOH
IPC: H04N19/52
CPC classification number: H04N19/52
Abstract: An encoder which includes circuitry and memory. Using the memory, the circuitry generates a list which includes candidates for a first motion vector for a first partition. The list has a maximum list size and an order of the candidates, and at least one of the maximum list size or the order of the candidates is dependent on at least one of a partition size or a partition shape of the first partition. The circuitry selects the first motion vector from the candidates included in the list; encodes an index indicating the first motion vector among the candidates in the list into the bitstream based on the maximum list size; and generates the predicted image for the first partition using the first motion vector.
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公开(公告)号：US20230156191A1
公开(公告)日：2023-05-18
申请号：US18148990
申请日：2022-12-30
Inventor： Sughosh Pavan SHASHIDHAR , Hai Wei SUN , Chong Soon LIM , Ru Ling LIAO , Han Boon TEO , Jing Ya LI , Takahiro NISHI , Kiyofumi ABE , Ryuichi KANOH , Tadamasa TOMA
IPC: H04N19/119 , H04N19/60 , H04N19/184 , H04N19/176
CPC classification number: H04N19/119 , H04N19/60 , H04N19/184 , H04N19/176
Abstract: An encoder includes circuitry and a memory coupled to the circuitry. The circuitry, in operation, determines whether or not a ternary split process of splitting a block into three sub blocks in a first direction parallel to a first longer side of the block is allowed by comparing a size of a second shorter side of the block to a minimum threshold value. The circuitry, responsive to the ternary split process being allowed, writes, into a bitstream, a split direction parameter indicative of a splitting direction. The circuitry, in operation, splits the block into a plurality of sub blocks in a direction indicated by the split direction parameter; splits the block into a plurality of sub blocks in a second direction parallel to the second shorter side of the block when the ternary split process is not allowed; and encodes the plurality of sub blocks.
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公开(公告)号：US20230145558A1
公开(公告)日：2023-05-11
申请号：US18065977
申请日：2022-12-14
Inventor： Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/51 , H04N19/176 , H04N19/182
CPC classification number: H04N19/51 , H04N19/176 , H04N19/182
Abstract: An encoder includes circuitry and a memory coupled to the circuitry, wherein the circuitry, in operation, performs a partition process. The partition process includes calculating first values of a set of pixels between a first partition and a second partition in a current block, using a first motion vector for the first partition; calculating second values of the set of pixels, using a second motion vector for the second partition; and calculating third values of the set of pixels by weighting the first values and the second values. When a ratio of a width to a height of the current block is larger than 4 or a ratio of the height to the width of the current block is larger than 4, the circuitry disables the partition process.
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公开(公告)号：US20230110758A1
公开(公告)日：2023-04-13
申请号：US18065513
申请日：2022-12-13
Inventor： Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/51 , H04N19/176 , H04N19/182
Abstract: An encoder includes circuitry and a memory coupled to the circuitry, wherein the circuitry, in operation, performs a partition process. The partition process includes calculating first values of a set of pixels between a first partition and a second partition in a current block, using a first motion vector for the first partition; calculating second values of the set of pixels, using a second motion vector for the second partition; and calculating third values of the set of pixels by weighting the first values and the second values. When a ratio of a width to a height of the current block is larger than 4 or a ratio of the height to the width of the current block is larger than 4, the circuitry disables the partition process.
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Patent Agency Ranking
公开(公告)号：US20230103036A1
公开(公告)日：2023-03-30
申请号：US18058057
申请日：2022-11-22
Inventor： Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/52 , H04N19/176 , H04N19/119
Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in operation, selects an encoding mode from among candidates including a decoder-side motion vector refinement (DMVR) encoding mode and a partition encoding mode. When the DMVR encoding mode is selected, the circuitry: obtains a first motion vector for a first image block; derives a second motion vector from the first motion vector using motion search; and generates a prediction image for the first image block using the second motion vector. When the partition encoding mode is selected, the circuitry: determines a plurality of partitions in a second image block; obtains a third motion vector for each partition; and generates a prediction image for the second image block using the third motion vector, without deriving a fourth motion vector from the third motion vector using motion search.
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公开(公告)号：US20230082160A1
公开(公告)日：2023-03-16
申请号：US18056963
申请日：2022-11-18
Inventor： Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/52 , H04N19/119 , H04N19/176
Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in operation, selects an encoding mode from among candidates including a decoder-side motion vector refinement (DMVR) encoding mode and a partition encoding mode. When the DMVR encoding mode is selected, the circuitry: obtains a first motion vector for a first image block; derives a second motion vector from the first motion vector using motion search; and generates a prediction image for the first image block using the second motion vector. When the partition encoding mode is selected, the circuitry: determines a plurality of partitions in a second image block; obtains a third motion vector for each partition; and generates a prediction image for the second image block using the third motion vector, without deriving a fourth motion vector from the third motion vector using motion search.
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公开(公告)号：US20230011264A1
公开(公告)日：2023-01-12
申请号：US17947733
申请日：2022-09-19
Inventor： Ru Ling LIAO , Chong Soon LIM , Hai Wei SUN , Han Boon TEO , Jing Ya LI , Sughosh Pavan SHASHIDHAR , Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA
IPC: H04N19/105 , H04N19/176 , H04N19/159
Abstract: An encoder includes: circuitry; and memory coupled to the circuitry. The circuitry, in operation, stores a first parameter into a bitstream, the first parameter indicating, as a prediction mode, one of (i) a multiple prediction mode in which a prediction image is generated by overlapping an inter prediction image of a current block and an intra prediction image of the current block and (ii) one of a plurality of prediction modes including a non-rectangular mode in which a prediction image is generated for each non-rectangular partition in the current block, and encodes the current block according to the prediction mode.
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公开(公告)号：US20230010849A1
公开(公告)日：2023-01-12
申请号：US17946784
申请日：2022-09-16
Inventor： Ru Ling LIAO , Chong Soon LIM , Hai Wei SUN , Han Boon TEO , Jing Ya LI , Sughosh Pavan SHASHIDHAR , Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA
IPC: H04N19/105 , H04N19/176 , H04N19/159
Abstract: An encoder includes: circuitry; and memory coupled to the circuitry. The circuitry, in operation, stores a first parameter into a bitstream, the first parameter indicating, as a prediction mode, one of (i) a multiple prediction mode in which a prediction image is generated by overlapping an inter prediction image of a current block and an intra prediction image of the current block and (ii) one of a plurality of prediction modes including a non-rectangular mode in which a prediction image is generated for each non-rectangular partition in the current block, and encodes the current block according to the prediction mode.
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公开(公告)号：US20220385939A1
公开(公告)日：2022-12-01
申请号：US17886281
申请日：2022-08-11
Inventor： Jing Ya LI , Chong Soon LIM , Sughosh Pavan SHASHIDHAR , Ru Ling LIAO , Hai Wei SUN , Han Boon TEO , Kiyofumi ABE , Tadamasa TOMA , Takahiro NISHI
IPC: H04N19/513 , H04N19/119 , H04N19/176 , H04N19/96
Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry corrects a base motion vector using a correction value in a fixed direction; and encodes a current partition by using the corrected base motion vector corrected. The correction value is specified by an index indicating one of correction values included in a table. The table is selected from among a plurality of tables, wherein the correction values in one of the plurality of tables have different increments from the correction values in another one of the plurality of tables.
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