公开(公告)号：US09063840B1

公开(公告)日：2015-06-23

申请号：US12715083

申请日：2010-03-01

Applicant: Chetan Deshpande ,  Sandeep Khanna ,  Varadarajan Srinivasan

Inventor： Chetan Deshpande ,  Sandeep Khanna ,  Varadarajan Srinivasan

IPC: G06F12/00 ,  G06F12/02

CPC classification number: G06F12/0207 ,  G11C15/04

Abstract: A CAM device including a CAM array, multiple match resolution (MMR) circuitry, and a priority encoder allows the addresses of multiple matching locations resulting from a first search operation to be generated without losing the match results generated in second search operation initiated prior to detection of the multiple match condition for the first search operation. When the multiple match condition is detected, the MMR circuitry asserts a stall signal that stalls search operations in the CAM array. The asserted stall signal also causes the match results of the first and second search operations to be stored in separate memory elements so that the addresses of all matching locations for the first search operation can be generated without disturbing the match results of the second search operation.

Abstract translation: 包括CAM阵列，多匹配分辨率（MMR）电路和优先级编码器的CAM设备允许生成由第一搜索操作产生的多个匹配位置的地址，而不会丢失在检测之前启动的第二搜索操作中产生的匹配结果 的第一搜索操作的多重匹配条件。 当检测到多重匹配条件时，MMR电路断言停止信号，停止CAM阵列中的搜索操作。 被断言的失速信号还使得第一和第二搜索操作的匹配结果被存储在单独的存储器元件中，使得可以在不干扰第二搜索操作的匹配结果的情况下生成用于第一搜索操作的所有匹配位置的地址。

公开(公告)号：US08901909B2

公开(公告)日：2014-12-02

申请号：US13618617

申请日：2012-09-14

Applicant: Sandeep Khanna ,  Maheshwaran Srinivasan ,  De Cai Li ,  Chetan Deshpande

Inventor： Sandeep Khanna ,  Maheshwaran Srinivasan ,  De Cai Li ,  Chetan Deshpande

IPC: H02M3/157 ,  H02M3/158

CPC classification number: H02M3/1584 ,  H02M2003/1586 ,  Y10T307/582

Abstract: An integrated circuit device for delivering power to a load includes a controller circuit, a cascade circuit, and a power delivery circuit. The controller circuit generates a plurality of control signals. The cascade circuit receives the control signals from the controller circuit and sequentially outputs the control signals onto a cascade bus. The power delivery circuit receives the control signals from the controller circuit and delivers an amount of current to the load, in response to one of the control signals.

公开(公告)号：US08767488B1

公开(公告)日：2014-07-01

申请号：US13301419

申请日：2011-11-21

Applicant: Varadarajan Srinivasan ,  Sandeep Khanna ,  Bindiganavale S. Nataraj

Inventor： Varadarajan Srinivasan ,  Sandeep Khanna ,  Bindiganavale S. Nataraj

IPC: G11C15/00 ,  G11C15/04 ,  G11C29/00 ,  G11C29/24

CPC classification number: G11C15/04 ,  G11C29/816 ,  G11C29/846 ,  G11C29/848

Abstract: A method and apparatus for performing half-column redundancy in a CAM device is disclosed, capable of replacing a defective half-column in the CAM array with only one half of another column. For example, present embodiments can provide twice the redundancy by replacing only one half of a defective CAM cell with one half of a spare cell or of a selected cell. The half-column redundancy disclosed herein provides finer granularity and higher effectiveness to the redundancy scheme as compared to conventional redundancy schemes employed on a CAM array. Thus, the CAM array can be designed and fabricated with a higher yield without having to accommodate for more spare columns than employed by conventional redundancy schemes, allowing for more efficient use of silicon area and a more robust CAM array design.

Abstract translation: 公开了一种用于在CAM设备中执行半列冗余的方法和装置，其能够仅用另一列的一半代替CAM阵列中的有缺陷的半柱。 例如，本实施例可以通过用备用单元或所选单元的一半替换缺陷CAM单元的仅一半来提供两倍的冗余。 与在CAM阵列上采用的常规冗余方案相比，这里公开的半柱冗余提供了更精细的粒度和更高的冗余方案的有效性。 因此，可以以更高的产量设计和制造CAM阵列，而不必适应比常规冗余方案采用的更多的备用列，从而更有效地使用硅区域和更强大的CAM阵列设计。

公开(公告)号：US08527510B2

公开(公告)日：2013-09-03

申请号：US11135825

申请日：2005-05-23

Applicant: Changsheng Chen ,  Adam Hyder ,  Sandeep Khanna

Inventor： Changsheng Chen ,  Adam Hyder ,  Sandeep Khanna

IPC: G06F17/30 ,  G06F7/00

CPC classification number: G06Q10/1053 ,  G06Q10/10

Abstract: A job searching and matching system and method is disclosed that gathers job seeker information in the form of job seeker parameters from one or more job seekers, gathers job information in the form of job parameters from prospective employers and/or recruiters, correlates the information with past job seeker behavior, parameters and behavior from other job seekers, and job parameters and, in response to a job seeker's query, provides matching job results based on common parameters between the job seeker and jobs along with suggested alternative jobs based on the co-relationships. In addition, the system correlates employer/recruiter behavior information with past employer/recruiter behavior, parameters and information concerning other job seekers, which are candidates to the employer, and resume parameters, and, in response to a Employer's query, provides matching job seeker results based on common parameters between the job seeker resumes and jobs along with suggested alternative job seeker candidates based on the identified co-relationships.

公开(公告)号：US20130009479A1

公开(公告)日：2013-01-10

申请号：US13618617

申请日：2012-09-14

Applicant: Sandeep Khanna ,  Maheshwaran Srinivasan ,  De Cai Li ,  Chetan Deshpande

Inventor： Sandeep Khanna ,  Maheshwaran Srinivasan ,  De Cai Li ,  Chetan Deshpande

IPC: H02J1/10

CPC classification number: H02M3/1584 ,  H02M2003/1586 ,  Y10T307/582

Abstract: An integrated circuit device for delivering power to a load includes a controller circuit, a cascade circuit, and a power delivery circuit. The controller circuit generates a plurality of control signals. The cascade circuit receives the control signals from the controller circuit and sequentially outputs the control signals onto a cascade bus. The power delivery circuit receives the control signals from the controller circuit and delivers an amount of current to the load, in response to one of the control signals.

公开(公告)号：US08023301B1

公开(公告)日：2011-09-20

申请号：US12899171

申请日：2010-10-06

Applicant: Varadarajan Srinivasan ,  Maheshwaran Srinivasan ,  Chetan Deshpande ,  Sandeep Khanna ,  Venkat Rajendher Reddy Gaddam

Inventor： Varadarajan Srinivasan ,  Maheshwaran Srinivasan ,  Chetan Deshpande ,  Sandeep Khanna ,  Venkat Rajendher Reddy Gaddam

IPC: G11C15/00

CPC classification number: G11C15/00 ,  G11C15/04

Abstract: Present embodiments allow a search engine to quickly save and restore state information to and from an external state memory when switching between multiple data flows by transferring the state information between the search engine and the external state memory in a parallel manner. More specifically, for CAM-based search engines configured according to present embodiments, the CAM array includes state information gating circuits that selectively allow state information stored in the CAM array's match latches to be transposed onto the array's bit lines and then read from the array using the array's sense amplifiers.

Abstract translation: 当前实施例允许搜索引擎通过以并行方式在搜索引擎和外部状态存储器之间传送状态信息来在多个数据流之间切换时，将状态信息快速地保存到外部状态存储器和从外部状态存储器恢复状态信息。 更具体地，对于根据本实施例配置的基于CAM的搜索引擎，CAM阵列包括状态信息门控电路，其选择性地允许存储在CAM阵列的匹配锁存器中的状态信息被转置到阵列的位线上，然后使用 阵列的读出放大器。

公开(公告)号：US07924589B1

公开(公告)日：2011-04-12

申请号：US12352528

申请日：2009-01-12

Applicant: Varadarajan Srinivasan ,  Sandeep Khanna

Inventor： Varadarajan Srinivasan ,  Sandeep Khanna

IPC: G11C15/00 ,  G11C29/00

CPC classification number: G11C15/00 ,  G11C15/04 ,  G11C15/046 ,  G11C29/846

Abstract: A content addressable memory (CAM) device includes an array having a number N of CAM rows, each row including a plurality of CAM cells coupled to a match line, a spare CAM row including a plurality of CAM cells coupled to a spare match line, and row replacement circuitry configured to functionally replace a defective CAM row and each subsequent CAM row in the array with corresponding next adjacent CAM rows, wherein a last CAM row in the array is functionally replaced by the spare CAM row.

Abstract translation: 内容可寻址存储器（CAM）装置包括具有N个CAM行的阵列，每行包括耦合到匹配线的多个CAM单元，包括耦合到备用匹配线的多个CAM单元的备用CAM行， 以及行替换电路，其被配置为功能地替换阵列中的有缺陷的CAM行和每个后续的CAM行，并具有对应的下一个相邻的CAM行，其中阵列中的最后一个CAM行被功能地替换为备用的CAM行。

公开(公告)号：US07920399B1

公开(公告)日：2011-04-05

申请号：US12909701

申请日：2010-10-21

Applicant: Bindiganavale S. Nataraj ,  Vinay Iyengar ,  Chetan Deshpande ,  Sandeep Khanna

Inventor： Bindiganavale S. Nataraj ,  Vinay Iyengar ,  Chetan Deshpande ,  Sandeep Khanna

IPC: G11C15/00

CPC classification number: G11C15/00

Abstract: A content addressable memory (CAM) device includes a CAM array and a configuration circuit. The CAM array has a plurality of rows of CAM cells, each row segmented into a plurality of row segments, each row segment including a plurality of CAM cells coupled to a corresponding match line segment, and a match line control circuit having an input coupled to the corresponding match line segment, an output coupled to the match line segment in a next row segment, and a control terminal to receive a corresponding enable signal. The configuration circuit has an input to receive configuration information indicative of a width and depth configuration of the CAM array and having outputs to generate the enable signals.

Abstract translation: 内容可寻址存储器（CAM）装置包括CAM阵列和配置电路。 CAM阵列具有多行CAM单元，每行分割成多个行段，每行段包括耦合到对应匹配线段的多个CAM单元，以及匹配线控制电路，其输入耦合到 相应的匹配线段，耦合到下一行段中的匹配线段的输出，以及用于接收相应使能信号的控制终端。 配置电路具有用于接收指示CAM阵列的宽度和深度配置并具有输出以产生使能信号的配置信息的输入。

公开(公告)号：US07916510B1

公开(公告)日：2011-03-29

申请号：US12844321

申请日：2010-07-27

Applicant: Alexei Starovoitov ,  Maheshwaran Srinivasan ,  Varadarajan Srinivasan ,  Sandeep Khanna ,  Sachin Joshi ,  Mark Birman

Inventor： Alexei Starovoitov ,  Maheshwaran Srinivasan ,  Varadarajan Srinivasan ,  Sandeep Khanna ,  Sachin Joshi ,  Mark Birman

IPC: G11C15/00

CPC classification number: G11C15/04 ,  G06F17/30985

Abstract: An apparatus and method of programming a search engine to implement regular expression search operations are disclosed that selectively transform a source regular expression into an equivalent reformulated regular expression in response to a determination of the architectural characteristics of the search engine. In this manner, the regular expression can be reformulated to optimize the configuration and available resources of the associated search engine.

Abstract translation: 公开了一种对搜索引擎进行编程以实现正则表达式搜索操作的装置和方法，其响应于确定搜索引擎的架构特征而选择性地将源正则表达式变换为等效的重新排列的正则表达式。 以这种方式，可以重新规定正则表达式以优化相关搜索引擎的配置和可用资源。

公开(公告)号：US07688609B1

公开(公告)日：2010-03-30

申请号：US11742997

申请日：2007-05-01

Applicant: Varadarajan Srinivasan ,  Bindiganavale S. Nataraj ,  Sandeep Khanna

Inventor： Varadarajan Srinivasan ,  Bindiganavale S. Nataraj ,  Sandeep Khanna

IPC: G11C15/00

CPC classification number: G11C15/04

Abstract: A content addressable memory (CAM) architecture. For one embodiment, the CAM architecture includes a plurality of rows of CAM cells, each row configured to generate match results on a corresponding match line, a number of comparand lines, each coupled to a corresponding CAM cell in each of the plurality of rows of CAM cells, a plurality of timed storage circuits, each having a data input coupled to a corresponding match line and having an enable input coupled to an enable signal line, a timing generator configured to generate an enable signal on the enable signal line, and a plurality of load elements.

Abstract translation: 内容可寻址存储器（CAM）架构。 对于一个实施例，CAM架构包括多个CAM单元行，每行被配置为在对应的匹配线上生成匹配结果，多个比较线，每个耦合到多行行中的每一行中的相应CAM单元 CAM单元，多个定时存储电路，每个具有耦合到对应匹配线的数据输入并具有耦合到使能信号线的使能输入的定时存储电路;定时发生器，被配置为在使能信号线上产生使能信号;以及 多个负载元件。