公开(公告)号：US4258234A

公开(公告)日：1981-03-24

申请号：US069276

申请日：1979-08-24

申请人： Chester M. Bordelon ,  Richard C. Sherwood

发明人： Chester M. Bordelon ,  Richard C. Sherwood

IPC分类号： H04R13/00 ,  H01F1/14 ,  H01F3/10 ,  H04R11/00 ,  H04R13/02

CPC分类号： H04R11/00

摘要： Electroacoustic devices are disclosed which comprise a permanent magnet and a magnetically permeable component. The permanent magnet is made of an Fe-Cr-Co alloy comprising 20-40 weight percent Cr and 3-30 weight percent Co; the permeable component is made of an Fe-Al alloy comprising 1.5-18 weight percent Al.In addition to a magnetic circuit, disclosed devices comprise means such as, e.g., an induction coil for inducing a variable magnetic field in the magnetic circuit. Also, devices comprise means for utilizing energy output in response to the magnetic field. Energy output may typically be in the form of an acoustical signal having desirably flat frequency response. Due to their low cost, disclosed devices are particularly suitable for use in telephone receivers and other mass produced articles.

摘要翻译： 公开了包括永磁体和磁导体部件的电声装置。 永磁体由包含20-40重量％Cr和3-30重量％Co的Fe-Cr-Co合金制成; 可渗透组分由包含1.5-18重量％的Al的Fe-Al合金制成。 除了磁路之外，公开的装置还包括诸如用于在磁路中感应可变磁场的感应线圈的装置。 此外，装置包括用于响应于磁场利用能量输出的装置。 能量输出通常可以是具有期望的平坦频率响应的声学信号的形式。 由于其低成本，所公开的设备特别适合用于电话接收机和其他批量生产的物品。

公开(公告)号：US4660166A

公开(公告)日：1987-04-21

申请号：US693479

申请日：1985-01-22

申请人： John J. Hopfield

发明人： John J. Hopfield

IPC分类号： G06F15/18 ,  G06J1/00 ,  G06N3/04 ,  G06N3/063 ,  G11C15/04 ,  G06F15/46

CPC分类号： G06N99/005 ,  G06J1/00 ,  G06N3/0445 ,  G06N3/063 ,  G11C15/04

摘要： Amplifiers, optionally having complementary (positive and negative) outputs, are connected to a matrix of input and output conductors (where the output conductors are each a pair for the case of complementary amplifier outputs). Each connection is implemented with a resistors R.sub.ij =R.sub.ji connecting the output(s) of amplifiers j to the input of amplifiers i, and vice versa, where i and j are the ith and jth amplifiers not necessarily in sequence. The value of each resistor is selected for the nature of the decisional operation intended to satisfy the following circuit equation of motion ##EQU1## where V.sub.j =g(u.sub.j) the output of amplifier j due to an input u.sub.i, C.sub.i is the input capacitance of amplifier i, and R.sub.i is the equivalent of p.sub.i and R.sub.ij according to the equation ##EQU2## and R.sub.ij =R.sub.ji. For the implementation of an associative memory, only positive (or negative) output terminals need be connected by resistors of unit value to input terminals of amplifiers i and j for the amplifier i in which a binary 1 is to be stored. (The amplifier j is one or more of the other amplifiers.) The outputs of the array of amplifiers will produce the entire word stored in response to a few bit-1 input signals I.sub.i to amplifiers so connected by resistors R.sub.ij. For problem solution, the resistance R.sub.ij =R.sub.ji is selected to have a value that, with appropriate signals at all input conductors (perhaps zero) the network will collectively drive to a stable state at the complementary output terminals which provide an output code word that is a very good solution to the problem.

摘要翻译： 可选地具有互补（正和负）输出的放大器连接到输入和输出导体的矩阵（输出导体对于互补放大器输出的情况下为一对）。 每个连接都用一个将放大器j的输出连接到放大器i的输入的电阻Rij = Rji，反之亦然，其中i和j是第i和第j个放大器不一定是顺序的。 选择每个电阻器的值用于决定运算的性质，以满足以下电路运动方程，其中Vj = g（uj）由于输入ui，放大器j的输出，Ci是输入电容 放大器i，Ri根据公式和Rij = Rji等价于pi和Rij。 为了实现关联存储器，只有正（或负）输出端子需要通过单位值的电阻器连接到放大器i和j的放大器i的输入端，用于要存储二进制1的放大器i。 （放大器j是其他放大器中的一个或多个）。放大器阵列的输出将产生响应于几个位1输入信号Ii存储的整个字，并将电阻Rij连接到放大器。 对于问题解决方案，电阻Rij = Rji被选择为具有这样的值，即，在所有输入导体（可能为零）的适当信号中，网络将共同地驱动到互补输出端处的稳定状态，该互补输出端提供输出码字 一个很好的解决方案。

公开(公告)号：US4633461A

公开(公告)日：1986-12-30

申请号：US752672

申请日：1985-07-08

申请人： Randall G. Banton ,  Rajiv Bhatia ,  Donald B. Grust ,  David R. Johnson ,  Joseph G. Kneuer ,  Kuang-Shin Lin ,  Henry S. McDonald ,  David A. Poppe ,  Jeffrey W. Reedy ,  Richard T. Wurth

发明人： Randall G. Banton ,  Rajiv Bhatia ,  Donald B. Grust ,  David R. Johnson ,  Joseph G. Kneuer ,  Kuang-Shin Lin ,  Henry S. McDonald ,  David A. Poppe ,  Jeffrey W. Reedy ,  Richard T. Wurth

IPC分类号： H04Q11/04

CPC分类号： H04Q11/0407

摘要： A multi-stage time division switch interconnects processors communicating over one or more channels on time division lines. One of the processors is designated as a common processor to provide the switching "mapping" information for the various stages of the switch sending the switching information to the memory and logic of each switched stage over dedicated channels which include channels on the time division line emanating from the common processor and time division channels which pass through several switches until the memory of the applicable switch is accessed.

摘要翻译： 多级时分交换机将处理器通过时分线上的一个或多个信道进行通信。 其中一个处理器被指定为公共处理器，以提供交换各个阶段的切换“映射”信息，该切换信号通过专用信道将切换信息发送到存储器和每个切换级的逻辑，这些专用信道包括时分线上发出的信道 来自通过多个交换机的公共处理器和时分信道直到访问适用的交换机的存储器。

公开(公告)号：US4608455A

公开(公告)日：1986-08-26

申请号：US365630

申请日：1982-04-05

申请人： Bruce E. McNair

发明人： Bruce E. McNair

IPC分类号： H04K1/02 ,  H04L9/12 ,  H04L9/02

CPC分类号： H04L63/0428 ,  H04K1/02 ,  H04L9/0637 ,  H04L9/0656 ,  H04L9/12 ,  H04J3/0602 ,  H04L7/046

摘要： The occurrence of a transmission error which produces a multibit error burst in the decrypted version of a composite speech and synchronization encrypted signal using a one-bit cipher feedback or similar encryption scheme is detected by monitoring the decrypted signal to detect synchronization errors. Upon detection of an error, the decrypted speech output is muted or disabled to avoid the annoying audible click otherwise produced.

摘要翻译： 通过监视解密信号以检测同步误差来检测在复合语音的解密版本中产生多位错误突发的传输错误的出现以及使用一位密码反馈或类似加密方案的同步加密信号。 在检测到错误时，解密的语音输出被静音或禁用，以避免另外产生烦人的可听见的点击。

公开(公告)号：US4578796A

公开(公告)日：1986-03-25

申请号：US548340

申请日：1983-11-03

申请人： Salomi T. Charalambous ,  Mark P. Horvath ,  Cathy P. House ,  Jeffrey A. Iapicco ,  Paul D. Lue ,  Shiv P. Verma

发明人： Salomi T. Charalambous ,  Mark P. Horvath ,  Cathy P. House ,  Jeffrey A. Iapicco ,  Paul D. Lue ,  Shiv P. Verma

IPC分类号： H04L27/00 ,  H04M11/00 ,  H04M11/06 ,  H04B1/38 ,  H04L5/16 ,  H04L27/10 ,  H04L27/18

CPC分类号： H04M11/06 ,  H04L27/00

摘要： A digital processor based voiceband modem that provides computers and terminals access to telephone lines and performs line control functions to originate, answer and terminate data calls in addition to converting baseband signals to voiceband and voiceband signals to baseband. The modem utilizes a signal processor that executes various signal converting algorithms under control of selected sets of instructions and further utilizes a digital processor that executes line control algorithms for alternative modes (i.e., originate or answer) of the data modem. An outgoing or incoming call enables the appropriate mode and, during the execution of the corresponding line control algorithm, various sets of instructions are selected to execute signal converting algorithms appropriate for the enabled mode of a specific one of various data modem types.

摘要翻译： 一种基于数字处理器的语音频带调制解调器，除了将基带信号转换为语音频带和语音频带信号到基带外，还提供计算机和终端接入电话线路并执行线路控制功能来发起，应答和终止数据呼叫。 调制解调器利用在所选择的指令集的控制下执行各种信号转换算法的信号处理器，并且进一步利用执行数据调制解调器的替代模式（即发起或应答）的线路控制算法的数字处理器。 输出或进入呼叫启用适当的模式，并且在执行相应的线路控制算法期间，选择各种指令集以执行适合于各种数据调制解调器类型中的特定一种的启用模式的信号转换算法。

公开(公告)号：US4468701A

公开(公告)日：1984-08-28

申请号：US295753

申请日：1981-08-24

申请人： Dennis S. Burcher ,  David M. Dickson ,  Jeffrey A. Walters

发明人： Dennis S. Burcher ,  David M. Dickson ,  Jeffrey A. Walters

IPC分类号： H04N5/445 ,  H04N5/22

CPC分类号： H04N5/445

摘要： A video signal actuated switch is disclosed having general application in the area of video home entertainment systems. The present video signal actuated switch comprises an impedance matching circuit (200) for matching the impedance of an incoming video signal (VS) for display. A high impedance amplifier (201), having an associated filtering circuit (201a), amplifies a particular band of frequencies comprising a known component frequency of the video signal (VS). No significant degradation of the standard video signal results from the application of the impedance matching circuit (200) in combination with the amplifier circuit (201). An actuator circuit (202) provides a signal (F) responsive to the output of the amplifier circuit (201) to a control circuit (203). The control circuit (203), responsive to signal (F), provides a control signal (E) for controlling the selection of video inputs to a video terminal (100) and for controlling or powering an RF modulator circuit (206). RF modulator circuit (206), responsive to control circuit (203), permits video signal (VS) to modulate a particular television channel frequency. Antenna switch (205), responsive to the control signal (E), preempts the viewing of antenna signal (G) at video terminal (100) in favor of the modulated output of modulator circuit (206).

摘要翻译： 公开了一种视频信号驱动开关，其在视频家庭娱乐系统领域具有一般应用。 本视频信号驱动开关包括用于匹配输入视频信号（VS）的阻抗用于显示的阻抗匹配电路（200）。 具有相关联的滤波电路（201a）的高阻抗放大器（201）放大包括视频信号（VS）的已知分量频率的特定频带。 由于阻抗匹配电路（200）与放大电路（201）的组合，不会导致标准视频信号的显着劣化。 致动器电路（202）响应于放大器电路（201）的输出向控制电路（203）提供信号（F）。 响应于信号（F）的控制电路（203）提供控制信号（E），用于控制对视频终端（100）的视频输入的选择以及用于控制或供电RF调制器电路（206）。 响应于控制电路（203）的RF调制器电路（206）允许视频信号（VS）调制特定的电视频道频率。 天线开关（205）响应于控制信号（E），抢占在视频终端（100）处的天线信号（G）的观看，有利于调制器电路（206）的调制输出。

公开(公告)号：US4458356A

公开(公告)日：1984-07-03

申请号：US394848

申请日：1982-07-02

申请人： William W. Toy

发明人： William W. Toy

IPC分类号： H04L27/00 ,  H04L27/227 ,  H04L27/38

CPC分类号： H04L27/2273 ,  H04L2027/0028 ,  H04L2027/0057

摘要： A carrier recovery circuit is disclosed for use in the receiver of a digital transmission wherein channels of data are formed by demodulating incoming quadrature-related carriers using receiver-generated, quadrature-related carriers. Phase alignment of the receiver-generated carriers to the incoming carriers is provided by integrated data from a preselected channel when the channels of data correspond to preselected regions in the signal space diagram.

摘要翻译： 公开了一种用于数字传输的接收机的载波恢复电路，其中通过使用接收机生成的正交相关载波解调输入的正交相关载波来形成数据通道。 当数据通道对应于信号空间图中的预选区域时，由预选通道的集成数据提供接收器产生的载波到输入载波的相位对准。

公开(公告)号：US4458314A

公开(公告)日：1984-07-03

申请号：US337868

申请日：1982-01-07

申请人： Gary J. Grimes

发明人： Gary J. Grimes

IPC分类号： G06F9/06 ,  G06F13/374 ,  G06F7/02

CPC分类号： G06F13/374

摘要： Circuitry is disclosed for allocating requests for demand-sharing bus access among a plurality of service requesting ports. During bus contention time, each requesting port synchronously and sequentially applies the digits of its assigned unique priority code to the bus beginning with the most significant digit. After the application of all digits, only the requesting port having the highest code remains in contention and it seizes the bus. The present invention provides flexibility in port preference by the use of a plurality of status flip-flops in each port for generating dynamic port parameter bits. The generated parameter bits are normally applied to the bus as the most significant bits of a dynamic port priority code during contention time. The state of the status flip-flops is controlled by circuitry which counts the number of packets of a specified size currently stored in the buffer memory of each port. This gives preference to the port whose memory contains the largest number of packets of the specified size. For a PBX, this permits short packets containing time sensitive system control messages to be given preference over longer packets containing relatively non-sensitive customer provided business information such as word processing files.

摘要翻译： 公开了用于在多个服务请求端口之间分配请求共享总线访问请求的电路。 在总线竞争时间期间，每个请求端口同步并顺序地将其分配的唯一优先级代码的数字应用于从最高有效位开始的总线。 在应用所有数字之后，只有具有最高代码的请求端口仍然存在争用，并占用总线。 本发明通过在每个端口中使用多个状态触发器来提供端口偏好的灵活性，用于产生动态端口参数位。 生成的参数位通常作为竞争时间期间动态端口优先级代码的最高有效位应用于总线。 状态触发器的状态由计算当前存储在每个端口的缓冲存储器中的指定大小的分组数量的电路来控制。 这样做优先于其内存包含指定大小的最大数据包数量的端口。 对于集团电话，这允许包含时间敏感的系统控制消息的短数据包被优先于包含相对不敏感的客户提供的业务信息（例如文字处理文件）的较长数据包。

公开(公告)号：US4457004A

公开(公告)日：1984-06-26

申请号：US346627

申请日：1982-02-08

申请人： Allen Gersho ,  Victor B. Lawrence

发明人： Allen Gersho ,  Victor B. Lawrence

IPC分类号： H04L1/00 ,  H04L25/48 ,  H04L25/49 ,  H04L27/34 ,  H04L25/04 ,  H04L25/20

CPC分类号： H04L1/0057 ,  H04L25/49 ,  H04L27/3427

摘要： An n-dimensional channel code is used in a data transmission system. The alphabet of codewords (data symbols) comprises a subset of points of a selected coset of a selected lattice. The alphabet includes at least one point of the coset whose norm (signal energy) is greater than at least one other point of the coset which is excluded from the alphabet.

摘要翻译： 在数据传输系统中使用n维信道码。 码字的字母表（数据符号）包括所选择的格子的选定陪集的点的子集。 字母表包括其范围（信号能量）大于从字母表排除的陪集的至少一个其他点的陪集中的至少一个点。

公开(公告)号：US4454593A

公开(公告)日：1984-06-12

申请号：US265069

申请日：1981-05-19

申请人： James R. Fleming ,  William A. Frezza ,  Gerald S. Soloway

发明人： James R. Fleming ,  William A. Frezza ,  Gerald S. Soloway

IPC分类号： G09G1/04 ,  G06F3/153 ,  G06T11/20 ,  G09G5/00 ,  G09G5/393 ,  H04M11/08 ,  H04N1/405 ,  H04N1/41 ,  H04N5/278 ,  H04N7/16 ,  G06F3/14 ,  G06F15/20 ,  G06K15/20

CPC分类号： H04M11/085 ,  G09G5/393 ,  H04N1/41

摘要： A technique for processing pictorial information to enable its display on a desired display device independent of the latter's resolution characteristics includes a unique encoding procedure and a corresponding decoding and display procedure. Attributes of each element of a picture or image (such as its color) are specified by a group of N bits. The bits are assembled to form M-bit active portions of a series of bytes. M and N need not be integrally related. Ones of the words also define the size of the elements with respect to a unit display space (the horizontal and vertical dimensions of each element can be different), the order in which the elements are arranged in the picture (e.g., left to right or vice versa) and the value of N. The bytes are decoded and the picture displayed by locating each pel in the unit screen coordinate space, mapping each location to a corresponding storage location in an array formed by a frame memory, writing the attributes of each pel in one or more of the storage locations, and sequentially reading the contents of the memory and applying the output to the display device.

摘要翻译： 用于处理图形信息以使其能够在期望的显示装置上显示而与后者的分辨率特性无关的技术包括唯一的编码过程和对应的解码和显示过程。 图像或图像的每个元素（如其颜色）的属性由一组N位指定。 这些位被组合以形成一系列字节的M位有效部分。 M和N不需要整体相关。 单词的一部分还定义了相对于单位显示空间的元素的大小（每个元素的水平和垂直尺寸可以不同），元素排列在图片中的顺序（例如，从左到右或 反之亦然）和N的值。字节被解码，并且通过将每个像素定位在单位屏幕坐标空间中来显示图像，将每个位置映射到由帧存储器形成的阵列中的相应存储位置，写入每个 在一个或多个存储位置中，并顺序地读取存储器的内容并将输出应用于显示设备。