Cryptography circuit protected against observation attacks, in particular of a high order
    1.
    发明授权
    Cryptography circuit protected against observation attacks, in particular of a high order 有权
    密码学电路保护免受观察攻击,特别是高阶攻击

    公开(公告)号:US08615079B2

    公开(公告)日:2013-12-24

    申请号:US13145177

    申请日:2010-01-18

    IPC分类号: G06F21/00

    摘要: A cryptography circuit protected against observation attacks comprises at least one register R providing a variable x masked by the mask m, the masked variable being encrypted by a first substitution box S -in a cyclic manner. The circuit also comprises a mask register M delivering at each cycle a mask mt, the transformation of m, the mask m being extracted from mt before being encrypted by a second substitution box S′, the new mask m′ obtained on output from this box S′ is transformed into a mask m′t before being stored in the mask register M. The transformation consists of a bijection or a composition law making it possible to reduce or indeed to cancel any high-order attack in accordance with a model of activity of the registers R and M. Cryptography circuits are protected against high-order observation attacks on installations based on masking.

    摘要翻译: 防止观察攻击的密码学电路包括至少一个寄存器R,其提供由掩模m屏蔽的变量x,掩蔽变量由循环方式由第一替换框S加密。 电路还包括一个屏蔽寄存器M,每个周期都传送一个掩码mt,m的变换,m个被提取的掩码m在被第二个替代框S'加密之前,从这个框输出得到的新的掩码m' S'在被存储在掩模寄存器M中之前被转换成掩模。该转换由双射或组合法组成,使得可以根据活动模型减少或确实取消任何高阶攻击 的寄存器R和M.加密电路被保护免受基于掩蔽的安装的高阶观察攻击。

    LOW-COMPLEXITY ELECTRONIC CIRCUIT PROTECTED BY CUSTOMIZED MASKING
    2.
    发明申请
    LOW-COMPLEXITY ELECTRONIC CIRCUIT PROTECTED BY CUSTOMIZED MASKING 有权
    通过自定义掩蔽保护的低复杂电子电路

    公开(公告)号:US20130129081A1

    公开(公告)日:2013-05-23

    申请号:US13509494

    申请日:2010-11-08

    IPC分类号: H04L9/28

    摘要: A cryptography circuit protected by masking, said circuit including means for encrypting binary words using at least one key krc, means for applying linear processing operations and nonlinear processing operations to said words and means for masking said words. The binary words are unmasked upstream of the nonlinear processing operations by using a mask kri and masked downstream of said processing operations by using a mask kr+1i, the masks kri and kr+1i being chosen from a set of masks that is specific to each instance of the circuit.

    摘要翻译: 一种由掩蔽保护的加密电路,所述电路包括用于使用至少一个密钥krc加密二进制字的装置,用于对所述字应用线性处理操作和非线性处理操作的装置以及用于掩蔽所述字的装置。 通过使用掩模kri并通过使用掩模kr + 1i在所述处理操作的下游屏蔽下来的二进制字在非线性处理操作的上游被屏蔽,掩模kri和kr + 1i是从一组特定于每个 电路实例。

    CRYPTOGRAPHY CIRCUIT PROTECTED AGAINST OBSERVATION ATTACKS, IN PARTICULAR OF A HIGH ORDER
    3.
    发明申请
    CRYPTOGRAPHY CIRCUIT PROTECTED AGAINST OBSERVATION ATTACKS, IN PARTICULAR OF A HIGH ORDER 有权
    防止观察攻击的纹理电路,特别是高阶

    公开(公告)号:US20120250854A1

    公开(公告)日:2012-10-04

    申请号:US13145177

    申请日:2010-01-18

    IPC分类号: H04L9/28

    摘要: A cryptography circuit protected against observation attacks comprises at least one register R providing a variable x masked by the mask m, the masked variable being encrypted by a first substitution box S in a cyclic manner. The circuit also comprises a mask register M delivering at each cycle a mask mt, the transformation of m, the mask m being extracted from mt before being encrypted by a second substitution box S′, the new mask m′ obtained on output from this box S′ is transformed into a mask m′t before being stored in the mask register M. The transformation consists of a bijection or a composition law making it possible to reduce or indeed to cancel any high-order attack in accordance with a model of activity of the registers R and M. Cryptography circuits are protected against high-order observation attacks on installations based on masking.

    摘要翻译: 防止观察攻击的加密电路包括至少一个寄存器R,其提供由掩码m屏蔽的变量x,该掩蔽变量由循环方式由第一替换盒S加密。 电路还包括一个屏蔽寄存器M,每个周期都传送一个掩码mt,m的变换,m个被提取的掩码m在被第二个替代框S'加密之前,从这个框输出得到的新的掩码m' S'在被存储在掩模寄存器M中之前被转换成掩模。该转换由双射或组合法组成,使得可以根据活动模型减少或确实取消任何高阶攻击 的寄存器R和M.加密电路被保护免受基于掩蔽的安装的高阶观察攻击。

    METHOD FOR PROTECTING THE DECRYPTING OF THE CONFIGURATION FILES FOR PROGRAMMABLE LOGIC CIRCUITS AND CIRCUIT IMPLEMENTING THE METHOD
    4.
    发明申请
    METHOD FOR PROTECTING THE DECRYPTING OF THE CONFIGURATION FILES FOR PROGRAMMABLE LOGIC CIRCUITS AND CIRCUIT IMPLEMENTING THE METHOD 审中-公开
    保护可编程逻辑电路配置文件的分解方法及电路实现方法

    公开(公告)号:US20110258459A1

    公开(公告)日:2011-10-20

    申请号:US13058548

    申请日:2009-07-30

    IPC分类号: G06F21/02

    CPC分类号: G06F21/755 G06F21/76

    摘要: A method for protecting a programmable logic circuit includes storing data file(s) used for the configuration of the programmable resources of the circuit in a non-volatile memory after having been encrypted. A decryption module internal to the circuit is responsible for decrypting the file(s) by using a secret key stored in the circuit, the decryption module being protected against attacks aiming to obtain the key during the decryption operation by implementing at least one countermeasure technique.

    摘要翻译: 一种用于保护可编程逻辑电路的方法包括将已经加密的用于电路可编程资源的配置的数据文件存储在非易失性存储器中。 电路内部的解密模块负责通过使用存储在电路中的秘密密钥对文件进行解密,解密模块被保护,以防止在解密操作期间通过实施至少一种对策技术来获得密钥的攻击。

    MODULATION METHOD AND DEVICE IMPLEMENTING A DIFFERENTIAL MODULATION, CORRESPONDING DEMODULATION METHOD AND DEVICE, SIGNAL AND COMPUTER SOFTWARE PRODUCTS
    6.
    发明申请
    MODULATION METHOD AND DEVICE IMPLEMENTING A DIFFERENTIAL MODULATION, CORRESPONDING DEMODULATION METHOD AND DEVICE, SIGNAL AND COMPUTER SOFTWARE PRODUCTS 有权
    调制方法和设备实现差分调制,相关解调方法和设备,信号和计算机软件产品

    公开(公告)号:US20120131411A1

    公开(公告)日:2012-05-24

    申请号:US13262751

    申请日:2010-04-02

    IPC分类号: H03M13/29 G06F11/10

    摘要: A method and apparatus are provided for modulating a binary source sequence including of a plurality of source words to generate modulated symbols. The method implements error-correction encoding of the plurality of source words, implementing one or more encoding modules, each implementing a separate error-correction code to generate a plurality of code words, the source words being encoded in series. The code words are interlaced to generate an interlaced sequence. The interlaced sequence is differentially modulated to generate modulated symbols. Each code word is broken down into at least one group with a number of bits equal to the base-2 logarithm of a number of states of a modulation implemented by the step of differentially modulating. The interlacing step distributes the groups such that two adjacent groups in the interlaced sequence belong to separate code words.

    摘要翻译: 提供了一种用于调制包括多个源字的二进制源序列以产生调制符号的方法和装置。 该方法实现多个源字的纠错编码,实现一个或多个编码模块,每个编码模块实现单独的纠错码以生成多个码字,源字串串编码。 代码字被隔行扫描以产生隔行扫描序列。 隔行扫描序列被差分调制以产生调制符号。 每个码字被分解成至少一组,其数量等于通过差分调制步骤实现的调制状态数的基数2对数。 交织步骤分配组,使得隔行序列中的两个相邻组属于单独的代码字。

    Automatic source separation via joint use of segmental information and spatial diversity
    7.
    发明申请
    Automatic source separation via joint use of segmental information and spatial diversity 审中-公开
    通过联合使用分段信息和空间分集进行自动分离

    公开(公告)号:US20110194709A1

    公开(公告)日:2011-08-11

    申请号:US13021692

    申请日:2011-02-04

    IPC分类号: H04B1/00

    CPC分类号: G10L21/0272 G10L25/18

    摘要: A source separation system is provided. The system includes a plurality of sources being subjected to an automatic source separation via a joint use of segmental information and spatial diversity. The system further includes a set of spectral shapes representing spectral diversity derived from the automatic source separation being automatically provided. The system still further includes a plurality of mixing parameters derived from the set of spectral shapes. Within a sampling range, a triplet is processed wherein a reconstruction of a Short Term Fourier Transform (STFT) corresponding to a source triplet among the set of triplets is performed.

    摘要翻译: 提供源分离系统。 该系统包括通过联合使用分段信息和空间分集而经受自动源分离的多个源。 该系统还包括一组频谱形状,表示自动提供自动源分离所得到的频谱分集。 该系统还包括从该组光谱形状导出的多个混合参数。 在采样范围内,处理三重态,其中执行对应于该组三元组中的源三元组的短期傅里叶变换(STFT)的重构。

    METHOD OF DECODING A SIGNAL IMPLEMENTING A PROGRESSIVE CONSTRUCTION OF A DECODING TREE, CORRESPONDING COMPUTER PROGRAM AND DECODING DEVICE
    8.
    发明申请
    METHOD OF DECODING A SIGNAL IMPLEMENTING A PROGRESSIVE CONSTRUCTION OF A DECODING TREE, CORRESPONDING COMPUTER PROGRAM AND DECODING DEVICE 有权
    解码信号的方法,实现解码树的渐进式构建,相应的计算机程序和解码设备

    公开(公告)号:US20110122004A1

    公开(公告)日:2011-05-26

    申请号:US12991234

    申请日:2009-05-05

    IPC分类号: H03M7/00

    CPC分类号: H04L1/0054

    摘要: A method of decoding a data signal includes progressively constructing a decoding tree, implementing at least two iterations of the following steps: selecting at least one child node of a current node belonging to a selection interval; storing the child nodes in a first stack; deleting the current node from the first stack; selecting a new current node from the first stack; and if the new current node is a leaf node, storing the path between the root node and the leaf node, in the second stack, and deleting the leaf node from the first stack; otherwise, return to the step of selecting a child node for the new current node. Moreover, the method assigns a probability of likelihood to the bits of at least one symbol of the data signal, taking account of the paths stored in the second stack, and determines a probabilistic estimation of the signal.

    摘要翻译: 解码数据信号的方法包括逐步构造解码树,实现以下步骤的至少两个迭代:选择属于选择间隔的当前节点的至少一个子节点; 将所述子节点存储在第一堆栈中; 从第一堆栈中删除当前节点; 从第一堆栈中选择新的当前节点; 并且如果新的当前节点是叶节点,则在第二堆栈中存储根节点和叶节点之间的路径,并从第一堆栈中删除叶节点; 否则,返回到为当前新节点选择子节点的步骤。 此外,该方法考虑到存储在第二堆叠中的路径,并且确定信号的概率估计,将数据信号的至少一个符号的比特分配给可能性概率。

    METHOD FOR PROVIDING WITH A SCORE AN OBJECT, AND DECISION-SUPPORT SYSTEM

    公开(公告)号:US20130173520A1

    公开(公告)日:2013-07-04

    申请号:US13821697

    申请日:2011-09-08

    IPC分类号: G06N5/02

    摘要: The present invention is related to a method for providing with a score an object represented by a target item from a multidimensional space, said score being representative of the probability that the object satisfies a given binary property, said method being performed in a computer environment comprising processing means connected to memory means, comprising the following steps: (a) providing and storing in the memory means data representative of a set of sample items from said multidimensional space, each sample item being associated with a multi-value label representative of the probability that an object represented by said sample item satisfies the given binary property; (b) storing in the memory means data representative of the target item; (c) with said processing means, generating and storing in said memory means data representative of an oriented binary tree with a given height, said binary tree being defined by a plurality of nodes having index values in relation with their position in the binary tree, said nodes comprising a root node, intermediate nodes and terminal nodes, and each node being associated with a subspace of the multidimensional space according to the following rules: if the node is a root node, the associated subspace is the whole multidimensional subspace; if the node is a non-terminal node, its associated subspace is split into two disjoint subspaces ε+ and ε− and respectively associated with a first child node and a second child node of said non-terminal node, said splitting being performed by the processing unit according to a classifier minimizing the number of sample items associated with a first given label value to belong to the subspace ε+, and/or the number of sample items associated with a second given label value to belong to the subspace ε−, said second label value being representative of a higher probability that an object represented by said sample item satisfies the given binary property than said first given label value; (d) with said processing means, associating with at least each terminal node of the binary tree a score depending on its index value in the binary tree, and storing the score value in the memory means; (e) with said processing means, identifying a target node, the target node being a teminal node whose associated subspace comprises the target item; and (f) outputting the score value associated with said target node. The invention is also related to a decision-support system.