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1.发明申请公开(公告)号：US20110258459A1
公开(公告)日：2011-10-20
申请号：US13058548
申请日：2009-07-30
IPC分类号： G06F21/02
CPC分类号： G06F21/755 , G06F21/76
摘要： A method for protecting a programmable logic circuit includes storing data file(s) used for the configuration of the programmable resources of the circuit in a non-volatile memory after having been encrypted. A decryption module internal to the circuit is responsible for decrypting the file(s) by using a secret key stored in the circuit, the decryption module being protected against attacks aiming to obtain the key during the decryption operation by implementing at least one countermeasure technique.
摘要翻译： 一种用于保护可编程逻辑电路的方法包括将已经加密的用于电路可编程资源的配置的数据文件存储在非易失性存储器中。 电路内部的解密模块负责通过使用存储在电路中的秘密密钥对文件进行解密，解密模块被保护，以防止在解密操作期间通过实施至少一种对策技术来获得密钥的攻击。
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2.发明申请CRYPTOGRAPHY CIRCUIT PARTICULARLY PROTECTED AGAINST INFORMATION-LEAK OBSERVATION ATTACKS BY THE CIPHERING THEREOF 审中-公开专门针对信息泄露观察电路进行特殊保护的电路电路公开(公告)号：US20120045061A1
公开(公告)日：2012-02-23
申请号：US13145181
申请日：2010-01-18
申请人： Jean-Luc Danger , Sylvain Guilley
发明人： Jean-Luc Danger , Sylvain Guilley
IPC分类号： H04L9/14
CPC分类号： H04L9/003 , G09C1/00 , H04L9/0625 , H04L2209/046 , H04L2209/12
摘要： A cryptography circuit, protected notably against information-leak observation attacks, comprises a functional key kc for executing a cryptography algorithm. It comprises a second key ki unique and specific to the circuit making it possible to protect by masking the functional and confidential key kc or a confidential implementation of the algorithm.
摘要翻译： 特别是针对信息泄漏观察攻击进行保护的加密电路包括用于执行密码学算法的功能密钥kc。 它包括唯一且特定于电路的第二密钥ki，使得可以通过掩蔽功能和机密密钥kc或算法的机密实现来保护。
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3.发明授权Cryptography circuit protected against observation attacks, in particular of a high order 有权密码学电路保护免受观察攻击，特别是高阶攻击公开(公告)号：US08615079B2
公开(公告)日：2013-12-24
申请号：US13145177
申请日：2010-01-18
申请人： Jean-Luc Danger , Sylvain Guilley
发明人： Jean-Luc Danger , Sylvain Guilley
IPC分类号： G06F21/00
CPC分类号： H04L9/003 , H04L9/0625 , H04L2209/046 , H04L2209/12
摘要： A cryptography circuit protected against observation attacks comprises at least one register R providing a variable x masked by the mask m, the masked variable being encrypted by a first substitution box S -in a cyclic manner. The circuit also comprises a mask register M delivering at each cycle a mask mt, the transformation of m, the mask m being extracted from mt before being encrypted by a second substitution box S′, the new mask m′ obtained on output from this box S′ is transformed into a mask m′t before being stored in the mask register M. The transformation consists of a bijection or a composition law making it possible to reduce or indeed to cancel any high-order attack in accordance with a model of activity of the registers R and M. Cryptography circuits are protected against high-order observation attacks on installations based on masking.
摘要翻译： 防止观察攻击的密码学电路包括至少一个寄存器R，其提供由掩模m屏蔽的变量x，掩蔽变量由循环方式由第一替换框S加密。 电路还包括一个屏蔽寄存器M，每个周期都传送一个掩码mt，m的变换，m个被提取的掩码m在被第二个替代框S'加密之前，从这个框输出得到的新的掩码m' S'在被存储在掩模寄存器M中之前被转换成掩模。该转换由双射或组合法组成，使得可以根据活动模型减少或确实取消任何高阶攻击 的寄存器R和M.加密电路被保护免受基于掩蔽的安装的高阶观察攻击。
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公开(公告)号：US09197412B2
公开(公告)日：2015-11-24
申请号：US13509494
申请日：2010-11-08
申请人： Sylvain Guilley , Jean-Luc Danger
发明人： Sylvain Guilley , Jean-Luc Danger
CPC分类号： H04L9/28 , H04L9/003 , H04L9/0618 , H04L2209/046 , H04L2209/12
摘要： A cryptography circuit protected by masking, said circuit including means for encrypting binary words using at least one key krc, means for applying linear processing operations and nonlinear processing operations to said words and means for masking said words. The binary words are unmasked upstream of the nonlinear processing operations by using a mask kri and masked downstream of said processing operations by using a mask kr+1i, the masks kri and kr+1i being chosen from a set of masks that is specific to each instance of the circuit.
摘要翻译： 一种由掩蔽保护的加密电路，所述电路包括用于使用至少一个密钥krc加密二进制字的装置，用于对所述字应用线性处理操作和非线性处理操作的装置以及用于掩蔽所述字的装置。 通过使用掩模kri并通过使用掩模kr + 1i在所述处理操作的下游屏蔽下来的二进制字在非线性处理操作的上游被屏蔽，掩模kri和kr + 1i是从一组特定于每个 电路实例。
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5.发明申请METHOD FOR TESTING CRYPTOGRAPHIC CIRCUITS, SECURED CRYPTOGRAPHIC CIRCUIT CAPABLE OF BEING TESTED, AND METHOD FOR WIRING SUCH CIRCUIT 有权用于测试结构电路的方法，可测试的安全可承受电路和用于接线这种电路的方法公开(公告)号：US20110261953A1
公开(公告)日：2011-10-27
申请号：US12919016
申请日：2009-02-11
申请人： Sylvain Guilley , Jean-Luc Danger
发明人： Sylvain Guilley , Jean-Luc Danger
IPC分类号： G06F21/00
CPC分类号： G01R31/31719 , G06F21/75 , G06F21/755 , H04L9/003 , H04L9/0625 , H04L2209/125 , H04L2209/127 , H04L2209/26
摘要： The present invention relates to a method for testing cryptography circuits. It also relates to a secure cryptography circuit capable of being tested. The cryptography circuit includes registers and logic gates, and a test thereof performs a differential power analysis on the registers of the circuit. A cryptography circuit being secure and including a first half-circuit associated with a second half-circuit operating in complementary logic, the electric power supply of the first half-circuit is separated from the electric power supply of the second half-circuit, the differential power analysis being carried out in parallel on each half-circuit, the two power supplies being combined into one and the same electric power supply after the test.
摘要翻译： 本发明涉及密码学电路测试方法。 它还涉及能够被测试的安全密码学电路。 加密电路包括寄存器和逻辑门，其测试对电路的寄存器执行差分功率分析。 密码电路是安全的并且包括与互补逻辑中工作的第二半电路相关联的第一半电路，第一半电路的电源与第二半电路的电源分离，差分 功率分析在每个半电路上并联进行，两个电源在测试后组合成同一个电源。
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6.发明授权Method for testing cryptographic circuits, secured cryptographic circuit capable of being tested, and method for wiring such circuit 有权用于测试加密电路的方法，能够被测试的安全密码电路以及用于布线这种电路的方法公开(公告)号：US09494645B2
公开(公告)日：2016-11-15
申请号：US12919016
申请日：2009-02-11
申请人： Sylvain Guilley , Jean-Luc Danger
发明人： Sylvain Guilley , Jean-Luc Danger
CPC分类号： G01R31/31719 , G06F21/75 , G06F21/755 , H04L9/003 , H04L9/0625 , H04L2209/125 , H04L2209/127 , H04L2209/26
摘要： The present invention relates to a method for testing cryptography circuits. It also relates to a secure cryptography circuit capable of being tested. The cryptography circuit includes registers and logic gates, and a test thereof performs a differential power analysis on the registers of the circuit. A cryptography circuit being secure and including a first half-circuit associated with a second half-circuit operating in complementary logic, the electric power supply of the first half-circuit is separated from the electric power supply of the second half-circuit, the differential power analysis being carried out in parallel on each half-circuit, the two power supplies being combined into one and the same electric power supply after the test.
摘要翻译： 本发明涉及密码学电路测试方法。 它还涉及能够被测试的安全密码学电路。 加密电路包括寄存器和逻辑门，其测试对电路的寄存器执行差分功率分析。 密码电路是安全的并且包括与互补逻辑中工作的第二半电路相关联的第一半电路，第一半电路的电源与第二半电路的电源分离，差分 功率分析在每个半电路上并联进行，两个电源在测试后组合成同一个电源。
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7.发明授权Method for detecting abnormalities in a cryptographic circuit protected by differential logic, and circuit for implementing said method 有权用于检测由差分逻辑保护的密码电路中的异常的方法，以及用于实现所述方法的电路公开(公告)号：US08955160B2
公开(公告)日：2015-02-10
申请号：US13058706
申请日：2009-07-30
CPC分类号： G06F21/558 , G06F21/75 , G06F21/755
摘要： In a method for detecting anomalies in a circuit protected by differential logic and which processes logic variables represented by a pair of components, a first network of cells carrying out logic functions on the first component of said pairs, a second network of dual cells operating in complementary logic on the second component, the logic functions being carried out by each pair of cells in a pre-charge phase placing the variables in a known state on input to the cells and followed by an evaluation phase where a calculation is performed by the cells, the method includes detecting an anomaly by at least one non-consistent state.
摘要翻译： 在用于检测由差分逻辑保护并且处理由一对分量表示的逻辑变量的电路中的异常的方法中，第一网络单元在所述对的第一分量上执行逻辑功能，第二双电池网络在 在第二组件上的互补逻辑，逻辑功能由预充电阶段中的每对单元执行，将变量置于已知状态，并输入到单元中，随后是由单元执行计算的评估阶段 该方法包括通过至少一个不一致状态来检测异常。
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8.发明申请公开(公告)号：US20120250854A1
公开(公告)日：2012-10-04
申请号：US13145177
申请日：2010-01-18
申请人： Jean-Luc Danger , Sylvain Guilley
发明人： Jean-Luc Danger , Sylvain Guilley
IPC分类号： H04L9/28
CPC分类号： H04L9/003 , H04L9/0625 , H04L2209/046 , H04L2209/12
摘要： A cryptography circuit protected against observation attacks comprises at least one register R providing a variable x masked by the mask m, the masked variable being encrypted by a first substitution box S in a cyclic manner. The circuit also comprises a mask register M delivering at each cycle a mask mt, the transformation of m, the mask m being extracted from mt before being encrypted by a second substitution box S′, the new mask m′ obtained on output from this box S′ is transformed into a mask m′t before being stored in the mask register M. The transformation consists of a bijection or a composition law making it possible to reduce or indeed to cancel any high-order attack in accordance with a model of activity of the registers R and M. Cryptography circuits are protected against high-order observation attacks on installations based on masking.
摘要翻译： 防止观察攻击的加密电路包括至少一个寄存器R，其提供由掩码m屏蔽的变量x，该掩蔽变量由循环方式由第一替换盒S加密。 电路还包括一个屏蔽寄存器M，每个周期都传送一个掩码mt，m的变换，m个被提取的掩码m在被第二个替代框S'加密之前，从这个框输出得到的新的掩码m' S'在被存储在掩模寄存器M中之前被转换成掩模。该转换由双射或组合法组成，使得可以根据活动模型减少或确实取消任何高阶攻击 的寄存器R和M.加密电路被保护免受基于掩蔽的安装的高阶观察攻击。
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9.发明申请METHOD FOR PROTECTING A PROGRAMMABLE CRYPTOGRAPHY CIRCUIT, AND CIRCUIT PROTECTED BY SAID METHOD 有权保护可编程曲线电路的方法和通过方法保护的电路公开(公告)号：US20110167279A1
公开(公告)日：2011-07-07
申请号：US12933949
申请日：2009-03-18
IPC分类号： G06F12/14
CPC分类号： G06F7/00 , G06F21/75 , G06F21/755 , G06F2207/7266
摘要： A programmable cryptography circuit includes memory-based cells defining the logic function of each cell, integrating a differential network capable of carrying out calculations on pairs of binary variables, including a first network of cells implementing logic functions on the first component of the pairs and a second network of dual cells operating in complementary logic on the second component of the pair. A calculation step includes a precharge phase, in which the variables are put into a known state at the output of the cells, and an evaluation phase in which a calculation is made by the cells. A phase of synchronizing the variables is inserted before the evaluation phase or the precharge phase in each cell capable of receiving several signals conveying input variables, the synchronization being carried out on the most delayed signal.
摘要翻译： 可编程密码学电路包括定义每个单元的逻辑功能的基于存储器的单元，对能够对二进制变量对执行计算的差分网络进行集成，所述差分网络包括在对的第一分量上实现逻辑功能的单元的第一网络，以及 双电池的第二网络在该对的第二部件上以互补逻辑运行。 计算步骤包括预充电阶段，其中变量在单元的输出处被置于已知状态，以及由单元进行计算的评估阶段。 在每个能够接收传送输入变量的信号的每个单元中的评估阶段或预充电阶段之前插入使变量同步的阶段，同步是在最延迟的信号上执行的。
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10.发明授权Method for protecting a programmable cryptography circuit, and circuit protected by said method 有权用于保护可编程加密电路的方法，以及由所述方法保护的电路公开(公告)号：US08904192B2
公开(公告)日：2014-12-02
申请号：US12933949
申请日：2009-03-18
CPC分类号： G06F7/00 , G06F21/75 , G06F21/755 , G06F2207/7266
摘要： A programmable cryptography circuit includes memory-based cells defining the logic function of each cell, integrating a differential network capable of carrying out calculations on pairs of binary variables, including a first network of cells implementing logic functions on the first component of the pairs and a second network of dual cells operating in complementary logic on the second component of the pair. A calculation step includes a precharge phase, in which the variables are put into a known state at the output of the cells, and an evaluation phase in which a calculation is made by the cells. A phase of synchronizing the variables is inserted before the evaluation phase or the precharge phase in each cell capable of receiving several signals conveying input variables, the synchronization being carried out on the most delayed signal.
摘要翻译： 可编程密码学电路包括定义每个单元的逻辑功能的基于存储器的单元，对能够对二进制变量对执行计算的差分网络进行集成，所述差分网络包括在对的第一分量上实现逻辑功能的单元的第一网络，以及 双电池的第二网络在该对的第二部件上以互补逻辑运行。 计算步骤包括预充电阶段，其中变量在单元的输出处被置于已知状态，以及由单元进行计算的评估阶段。 在每个能够接收传送输入变量的信号的每个单元中的评估阶段或预充电阶段之前插入使变量同步的阶段，同步是在最延迟的信号上执行的。
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