公开(公告)号：US20060273468A1

公开(公告)日：2006-12-07

申请号：US11150905

申请日：2005-06-13

申请人： Abhijit Mahajan ,  Ali Sarfaraz

发明人： Abhijit Mahajan ,  Ali Sarfaraz

IPC分类号： H01L23/48

CPC分类号： H05K1/181 ,  H05K2201/09236 ,  H05K2201/09672 ,  H05K2201/10159 ,  H05K2201/10734 ,  Y02P70/611

摘要： Disclosed herein is a method and circuit arrangement for a multi-layer ball grid array configuration. In one embodiment, there is presented a board comprising a first surface, a second surface, and a plurality of vias. The second surface is connected to the first surface. The plurality of vias are positioned to form a substantially straight line on the first surface. The plurality of vias comprises a first via and a second via. The first via is adjacent to the second via. The first via emerges on the second surface on one side of the substantially straight line. The second via emerges on another side of the substantially straight line.

摘要翻译： 本文公开了一种用于多层球栅阵列配置的方法和电路装置。 在一个实施例中，呈现了包括第一表面，第二表面和多个通孔的板。 第二表面连接到第一表面。 多个通孔被定位成在第一表面上形成基本上直的线。 多个通孔包括第一通孔和第二通孔。 第一通孔与第二通孔相邻。 第一通孔出现在基本上直线的一侧的第二表面上。 第二通道出现在基本上直线的另一侧。

公开(公告)号：US07932604B2

公开(公告)日：2011-04-26

申请号：US11150905

申请日：2005-06-13

申请人： Abhijit Mahajan ,  Ali Sarfaraz

发明人： Abhijit Mahajan ,  Ali Sarfaraz

IPC分类号： H01L23/48

CPC分类号： H05K1/181 ,  H05K2201/09236 ,  H05K2201/09672 ,  H05K2201/10159 ,  H05K2201/10734 ,  Y02P70/611

摘要： Disclosed herein is a method and circuit arrangement for a multi-layer ball grid array configuration. In one embodiment, there is presented a board comprising a first surface, a second surface, and a plurality of vias. The second surface is connected to the first surface. The plurality of vias are positioned to form a substantially straight line on the first surface. The plurality of vias comprises a first via and a second via. The first via is adjacent to the second via. The first via emerges on the second surface on one side of the substantially straight line. The second via emerges on another side of the substantially straight line.

摘要翻译： 本文公开了一种用于多层球栅阵列配置的方法和电路装置。 在一个实施例中，呈现了包括第一表面，第二表面和多个通孔的板。 第二表面连接到第一表面。 多个通孔被定位成在第一表面上形成基本上直的线。 多个通孔包括第一通孔和第二通孔。 第一通孔与第二通孔相邻。 第一通孔出现在基本上直线的一侧的第二表面上。 第二通道出现在基本上直线的另一侧。

公开(公告)号：US07633764B2

公开(公告)日：2009-12-15

申请号：US11115769

申请日：2005-04-27

申请人： Abhijit Mahajan ,  Ali Sarfaraz

发明人： Abhijit Mahajan ,  Ali Sarfaraz

IPC分类号： H05K7/00

CPC分类号： H05K1/181 ,  H05K2201/09236 ,  H05K2201/09672 ,  H05K2201/10159 ,  H05K2201/10734 ,  Y02P70/611

摘要： Presented herein are ball grid array configurations for reducing path distances. In an exemplary embodiment, there is presented a memory system. The memory system comprises a printed circuit board, a memory controller, and a memory. The printed circuit board comprises a first layer and a second layer. The memory controller comprises a first plurality of pins connected to the first layer and a second plurality of pins connected to the second layer. The memory comprises a first plurality of pins connected to the first layer and a second plurality of pins connected to the second layer. The first layer comprises a plurality of connection paths connecting the first plurality of pins of the memory to the first plurality of pins of the memory controller. The second layer comprises a plurality of connection paths connecting the second plurality of pins of the memory to the second plurality of pins of the memory controller.

摘要翻译： 这里提出了用于减小路径距离的球栅阵列配置。 在示例性实施例中，呈现存储器系统。 存储器系统包括印刷电路板，存储器控制器和存储器。 印刷电路板包括第一层和第二层。 存储器控制器包括连接到第一层的第一多个引脚和连接到第二层的第二多个引脚。 存储器包括连接到第一层的第一多个引脚和连接到第二层的第二多个引脚。 第一层包括将存储器的第一多个引脚连接到存储器控制器的第一多个引脚的多个连接路径。 第二层包括将存储器的第二多个引脚连接到存储器控制器的第二多个引脚的多个连接路径。

公开(公告)号：US08738818B2

公开(公告)日：2014-05-27

申请号：US12973906

申请日：2010-12-21

申请人： Abhijit Mahajan

发明人： Abhijit Mahajan

IPC分类号： G06F3/00

CPC分类号： G06F11/221

摘要： An apparatus and method for analyzing bidirectional data exchanged between two electronic devices is disclosed. In one embodiment, received and transmitted data at a first physical layer interface (PHY) is tapped by a second PHY in a first electronic device substantially before the received data is processed in the first electronic device and substantially before the transmitted data is processed by a second electronic device. Further, the tapped received and transmitted data is output to an analyzer for analyzing the received and transmitted data by the second PHY in the first electronic device.

摘要翻译： 公开了一种用于分析在两个电子设备之间交换的双向数据的装置和方法。 在一个实施例中，在第一电子设备中的第一物理层接口（PHY）处的接收和发送的数据被第一电子设备中的第二PHY抽取，基本上在第一电子设备中处理接收到的数据之前并且基本上在所发送的数据被处理之前 第二电子设备。 此外，被分接的接收和发送的数据被输出到分析器，用于分析由第一电子设备中的第二PHY接收和发送的数据。

公开(公告)号：US20060245228A1

公开(公告)日：2006-11-02

申请号：US11115769

申请日：2005-04-27

申请人： Abhijit Mahajan ,  Ali Sarfaraz

发明人： Abhijit Mahajan ,  Ali Sarfaraz

IPC分类号： G11C5/02

CPC分类号： H05K1/181 ,  H05K2201/09236 ,  H05K2201/09672 ,  H05K2201/10159 ,  H05K2201/10734 ,  Y02P70/611

摘要： Presented herein are ball grid array configurations for reducing path distances. In an exemplary embodiment, there is presented a memory system. The memory system comprises a printed circuit board, a memory controller, and a memory. The printed circuit board comprises a first layer and a second layer. The memory controller comprises a first plurality of pins connected to the first layer and a second plurality of pins connected to the second layer. The memory comprises a first plurality of pins connected to the first layer and a second plurality of pins connected to the second layer. The first layer comprises a plurality of connection paths connecting the first plurality of pins of the memory to the first plurality of pins of the memory controller. The second layer comprises a plurality of connection paths connecting the second plurality of pins of the memory to the second plurality of pins of the memory controller.

公开(公告)号：US20120159007A1

公开(公告)日：2012-06-21

申请号：US12973906

申请日：2010-12-21

申请人： ABHIJIT MAHAJAN

发明人： ABHIJIT MAHAJAN

IPC分类号： G06F3/00

CPC分类号： G06F11/221

摘要： An apparatus and method for analyzing bidirectional data exchanged between two electronic devices is disclosed. In one embodiment, received and transmitted data at a first physical layer interface (PHY) is tapped by a second PHY in a first electronic device substantially before the received data is processed in the first electronic device and substantially before the transmitted data is processed by a second electronic device. Further, the tapped received and transmitted data is output to an analyzer for analyzing the received and transmitted data by the second PHY in the first electronic device.

摘要翻译： 公开了一种用于分析在两个电子设备之间交换的双向数据的装置和方法。 在一个实施例中，在第一电子设备中的第一物理层接口（PHY）处的接收和发送的数据被第一电子设备中的第二PHY抽取，基本上在第一电子设备中处理接收到的数据之前并且基本上在所发送的数据被处理之前 第二电子设备。 此外，被分接的接收和发送的数据被输出到分析器，用于分析由第一电子设备中的第二PHY接收和发送的数据。