Multiple channel quadrature communication system and method
    2.
    发明授权
    Multiple channel quadrature communication system and method 失效
    多通道正交通信系统及方法

    公开(公告)号:US5559788A

    公开(公告)日:1996-09-24

    申请号:US366198

    申请日:1994-12-29

    IPC分类号: H04J13/00 H04J13/10

    摘要: A transmitter is provided which simultaneously transmits waveforms such as with different data rates. These transmissions are modulated (e.g. phase modulated) onto quadrature channels of a common carrier, and are then combined. The resulting composite modulated waveform is upconverted to RF, power amplified, split and routed to separate ports for transmission. The transmitted signals are then received, downconverted and demodulated to produce the original signals.

    摘要翻译: 提供了一种发送器,它同时发送不同数据速率的波形。 这些传输被调制(例如,相位调制)到公共载波的正交信道上,然后被组合。 所得到的复合调制波形上变频到RF,功率放大,分离和路由到分离端口进行传输。 然后发送的信号被接收,下变频和解调以产生原始信号。

    High rate-low rate PN code tracking system
    3.
    发明授权
    High rate-low rate PN code tracking system 失效
    高速率低速PN码跟踪系统

    公开(公告)号:US5299229A

    公开(公告)日:1994-03-29

    申请号:US10723

    申请日:1993-01-29

    IPC分类号: H04K1/02 H04B1/7085 H04L27/30

    CPC分类号: H04B1/7085

    摘要: A high PN code rate receiving system is provided for receiving, recovering and tracking a high rate PN composite code comprising a low rate PN code combined with a high rate PN code and wherein the receiving system comprises a broad band receiver for receiving the high rate PN composite code and further includes a data recovery channel and a tracking loop channel. The data recovery channel comprises a high rate mixer and a low rate mixer for removing the high data rate component code and the low data rate component code to provide a low data rate data stream. The tracking loop channel comprises a high rate early-late tracking system for producing a high rate error signal and further comprises a low rate portion of the tracking loop for producing a low rate error signal which is combined with the data output to provide a clock error signal. The clock error signal is applied to a voltage controlled oscillator to produce a low data rate clock and a high data rate clock which are coupled to a low data rate code generator and a high data rate code generator which synchronize the tracking loop and said data channel.

    摘要翻译: 提供高PN码率接收系统用于接收,恢复和跟踪包括与高速率PN码组合的低速率PN码的高速率PN复合码,并且其中接收系统包括用于接收高速率PN 并且还包括数据恢复通道和跟踪循环通道。 数据恢复通道包括用于去除高数据速率分量代码和低数据速率分量代码以提供低数据速率数据流的高速率混频器和低速率混频器。 跟踪环通道包括用于产生高速率误差信号的高速率早期跟踪系统,并且还包括用于产生低速率误差信号的跟踪环路的低速率部分,该低速率误差信号与数据输出相结合以提供时钟误差 信号。 时钟误差信号被施加到压控振荡器以产生低数据速率时钟和高数据速率时钟,该数据速率时钟和高数据速率时钟耦合到低数据速率代码发生器和高数据速率代码发生器,其使跟踪环路和所述数据通道同步 。

    Code lengthening system
    5.
    发明授权
    Code lengthening system 失效
    代码延长系统

    公开(公告)号:US4809295A

    公开(公告)日:1989-02-28

    申请号:US40526

    申请日:1987-04-20

    IPC分类号: H04J13/10 H04L9/22 H04L9/04

    摘要: Apparatus and a method of generating very very long pseudonoise (PN) spread spectrum codes is provided where the code is so long that it need never repeat itself during actual use. The transmitter is adapted to start to transmit one set of a plurality of component codes as a composite code having correlation properties with the component codes. When the first set of component codes are acquired at the receiver the composite code is then transmitted as a component of a different composite code which contains the previous composite code and a second new set of component codes which have correlation properties with the new set of component codes. When the second set of component codes are acquired by the receiver the composite code is then transmitted as a third new and different composite code which contains a third new set of component codes which have correlation properties with third new set of component codes. When the third new set of component set of codes is required the transmitter is already transmitting a very very long composite code but may lengthen the composite code by employing further set of component codes or may continue to transmit the very very long composite code without having any correlation properties with any of the component codes being transmitted.

    摘要翻译: 提供了一种生成非常长的伪噪声(PN)扩频码的装置和方法,其中代码很长,以致在实际使用期间它不需要重复。 发射机适于开始发送一组多个分量码,作为具有与分量码相关性的组合码。 当在接收机处获取第一组分量代码时,复合代码然后作为包含先前复合代码的不同复合代码的分量被发送,并且第二组新的组件代码与新的组件集合具有相关属性 代码。 当接收机获取第二组分量代码时,复合代码随后作为第三新的和不同的复合代码被发送,该复合代码包含具有与第三组新组件代码相关性的第三组新组件代码。 当需要第三组新的组件组件时,发送器已经在发送非常长的组合代码,但可以通过采用另外的组件代码集合来延长组合代码,或者可以继续发送非常长的组合代码,而不需要任何 与要发送的任何组件代码的相关性。

    Rapid acquisition dispersive channel receiver integrated circuit
    6.
    发明授权
    Rapid acquisition dispersive channel receiver integrated circuit 失效
    快速采集色散通道接收器集成电路

    公开(公告)号:US06373910B1

    公开(公告)日:2002-04-16

    申请号:US09765158

    申请日:2001-01-17

    IPC分类号: H04B110

    CPC分类号: H03H17/0294 H04L25/03006

    摘要: An integrated circuit includes a reconfigurable FIR filter has an input port for receiving digital input signals and an output coupled to a coherent signal processor and a coherent memory. The FIR filter programmably provides filtered signals to the coherent signal processor for storage in the coherent memory. The integrated circuit further includes a sequential weight processor having an input coupled to an output of the coherent memory. The sequential weight processor includes a weight memory and operates to output symbol soft decision data resulting from processing the digital input signals. The integrated circuit is programmable into one of a plurality of operating modes, including at least one of a received signal acquisition mode, a channel estimator mode, an adaptive equalizer mode, and a channel-wise differential mode.

    摘要翻译: 集成电路包括可重构FIR滤波器,具有用于接收数字输入信号的输入端口和耦合到相干信号处理器和相干存储器的输出。 FIR滤波器可编程地将经滤波的信号提供给相干信号处理器以存储在相干存储器中。 集成电路还包括具有耦合到相干存储器的输出的输入的顺序权重处理器。 顺序加权处理器包括权重存储器,并且操作以输出由处理数字输入信号得到的符号软判决数据。 集成电路可编程为多种操作模式之一,包括接收信号采集模式,信道估计模式,自适应均衡器模式和频道方式差分模式中的至少一种。

    Coherent sequential PN code extractor
    7.
    发明授权
    Coherent sequential PN code extractor 失效
    相干序列PN码提取器

    公开(公告)号:US5504787A

    公开(公告)日:1996-04-02

    申请号:US216744

    申请日:1994-03-23

    IPC分类号: H04B1/7075 H04L7/00

    CPC分类号: H04B1/7075

    摘要: Apparatus and a method for increasing the speed of acquisition of PN coded signals includes a novel PN code clock extraction circuit which is coupled in parallel to a code tracking loop and acquisition loop of a PN receiver of the type having a replica PN code generator which is slip controlled to synchronize with the received PN coded signals. The novel PN code clock extraction circuit detects the clock transition of the received PN coded signals and synchronized the replica PN code generator clock transition signals so that there is no misalignment during acquisition. A switch control in the acquisition loop circuit senses the synchronization of the replica PN code generator transition and the received PN code transition and disconnects the PN code clock extraction circuit after synchronization of clock transition and before acquisition of the PN code so that the acquisition loop detects the PN code synchronization with a full strength signal.

    摘要翻译: 用于提高PN编码信号的采集速度的装置和方法包括一个新颖的PN码时钟提取电路,其并行耦合到具有复制PN码发生器的类型的PN接收机的码跟踪环路和采集环路, 滑动控制与所接收的PN编码信号同步。 新颖的PN码时钟提取电路检测接收的PN编码信号的时钟转换,并同步复制PN码发生器时钟转换信号,使得在采集期间不存在未对准。 采集环路电路中的开关控制检测复制PN码发生器转换和接收到的PN码转换的同步,并且在PN时钟转换同步之后和PN码的获取之前断开PN码时钟提取电路,使得采集环路检测到 PN码与全强度信号同步。

    Apparatus and method for generating and utilizing pseudonoise code
sequences
    8.
    发明授权
    Apparatus and method for generating and utilizing pseudonoise code sequences 失效
    用于生成和利用伪噪声码序列的装置和方法

    公开(公告)号:US5598154A

    公开(公告)日:1997-01-28

    申请号:US348669

    申请日:1994-12-02

    摘要: A set of independent pseudonoise (PN) component codes greater than two are combined in a manner which produces one or more I and Q uncorrelated orthogonal pairs of resulting combined PN sequences. At least two of the component codes in a resulting combined PN sequence are combined in a manner which produces an overall imbalance of ones and zeros in the binary expression of the resulting combined PN sequence so that the resulting composite code has a partial correlation with a predetermined one of the PN component codes. In the preferred embodiment, three component codes are combined to produce uncorrelated orthogonal pairs of composite codes wherein at least one of the pairs of composite codes is produced to have a partial correlation with one or more of the component codes.

    摘要翻译: 大于2的独立伪噪声(PN)分量码的集合以产生所得到的组合PN序列的一个或多个I和Q不相关的正交对的方式组合。 所得到的组合PN序列中的至少两个分量代码以产生组合PN序列的二进制表达式中产生1和0的整体不平衡的方式组合,使得所得到的合成代码与预定的 一个PN组件代码。 在优选实施例中,组合三个分量代码以产生不相关的复合码正交对,其中产生所述复合码对中的至少一个与部分码中的一个或多个部分相关。

    High processing gain acquisition and demodulation apparatus
    9.
    发明授权
    High processing gain acquisition and demodulation apparatus 失效
    高处理增益采集解调装置

    公开(公告)号:US5495509A

    公开(公告)日:1996-02-27

    申请号:US216746

    申请日:1994-03-23

    CPC分类号: H04B1/708 H04B1/7085

    摘要: Apparatus for rapidly acquiring a high performance gain long PN code having a preamble header in real time includes appratus for rapid acquiring and tracking a short PN code in said preamble header and further includes apparatus for demodulating and tracking a long PN code which follows said preamble header. After acquiring the short PN code, the short PN replica code is applied to the long code demodulation and tracking apparatus. The short PN code is employed to synchronize the long code demodulation and tracking apparatus by detecting the time of occurrence of a sync word in said preamble header and is employed to generate a switch point signal and switch from a short PN replica code to a long PN replica code at the input to the long code demodulation and tracking device in real time.

    摘要翻译: 用于快速获取具有前导码头的高性能增益长PN码的设备包括用于在所述前同步码报头中快速获取和跟踪短PN码的装置,并且还包括用于解调和跟踪跟随所述前同步头的长PN码的装置 。 在获取短PN码之后,将短PN复制码应用于长码解调和跟踪装置。 短PN码用于通过检测所述前同步码报头中同步字的出现时间来同步长码解调和跟踪装置,并用于产生切换点信号并从短PN复制码切换到长PN 复制代码在输入到长码解调和跟踪设备的实时。

    Burst jammer erasure circuit for spread spectrum receivers
    10.
    发明授权
    Burst jammer erasure circuit for spread spectrum receivers 失效
    用于扩频接收机的突发干扰消除电路

    公开(公告)号:US4890297A

    公开(公告)日:1989-12-26

    申请号:US259660

    申请日:1988-10-19

    IPC分类号: H04B1/707 H04K3/00

    CPC分类号: H04K3/228 H04B1/707

    摘要: The present invention provides a novel burst erasing automatic gain control circuit which includes the basic elements of an automatic gain control circuit and further includes in the loop control circuit, slow response wideband filter means, and a hard limiter which limits the AGC'ed output from the amplifier so that the signal reaching the slow response wideband filter means never exceeds a predetermined value which would cause distortion in the feedback loop. The output of the novel automatic gain control circuit is coupled to a despreading circuit which removes substantially all of the remaining burst jamming signals.

    摘要翻译: 本发明提供了一种新颖的脉冲串擦除自动增益控制电路,其包括自动增益控制电路的基本元件,并且还包括在环路控制电路,慢响应宽带滤波器装置和限制AGC的输出的硬限幅器 使得到达慢响应宽带滤波器的信号意味着从不超过将导致反馈回路中的失真的预定值。 新颖的自动增益控制电路的输出耦合到解扩电路,其去除了基本上所有剩余的突发干扰信号。