METHOD FOR RECOVERING A POSITION AND CLOCK PERIOD FROM AN INPUT DIGITAL SIGNAL
    2.
    发明申请
    METHOD FOR RECOVERING A POSITION AND CLOCK PERIOD FROM AN INPUT DIGITAL SIGNAL 有权
    从输入数字信号中恢复位置和时钟周期的方法

    公开(公告)号:US20100037084A1

    公开(公告)日:2010-02-11

    申请号:US12580535

    申请日:2009-10-16

    Applicant: Alan LLOYD

    Inventor: Alan LLOYD

    CPC classification number: H04J3/0605

    Abstract: A method for recovering a position and clock period from an input bi-phase encoded digital signal such as an SPDIF signal counts the intervals between phase changes of the input digital signal to derive the longest interval between the phase changes. The longest interval indicates the position and period length of a preamble portion of sub-frames of the signal and is stored, and a signal indicating the position of the longest interval between phase changes and an indication of the clock period of the input digital signal is provided.

    Abstract translation: 用于从诸如SPDIF信号的输入双相编码数字信号恢复位置和时钟周期的方法对输入数字信号的相位变化之间的间隔进行计数,以导出相位变化之间的最长间隔。 最长间隔表示信号的子帧的前导部分的位置和周期长度,并被存储,并且指示相位改变之间的最长间隔的位置与输入数字信号的时钟周期的指示的信号是 提供。

    Integrated circuit interface with locking signal
    3.
    发明授权
    Integrated circuit interface with locking signal 有权
    具有锁定信号的集成电路接口

    公开(公告)号:US07660061B2

    公开(公告)日:2010-02-09

    申请号:US11753286

    申请日:2007-05-24

    Applicant: Alan Lloyd

    Inventor: Alan Lloyd

    CPC classification number: H04J3/0605

    Abstract: An integrated circuit for recovering a position and clock period from an input bi-phase encoded digital signal, such as an SPDIF signal, has a longest interval detector arranged to count the intervals between phase changes of the input digital signal to derive the longest interval between the phase changes. The longest interval indicates the position and period length of a preamble portion of sub-frames of the signal. A store arranged to store the longest interval between phase changes and an output provides a signal indicating the position of the longest interval between phase changes and an indication of the clock period of the input digital signal. The longest interval detector includes a pair of counters for even and odd phase transitions and counts in multiple intervals such that a clock period of 2 UI can be recovered directly from the longest pulse of 6 UI present in the preamble X of an SPDIF signal.

    Abstract translation: 用于从诸如SPDIF信号的输入双相编码数字信号恢复位置和时钟周期的集成电路具有最长间隔检测器,其布置成对输入数字信号的相位变化之间的间隔进行计数,以导出第 相变。 最长间隔表示信号的子帧的前导码部分的位置和周期长度。 存储在相位变化和输出之间存储最长间隔的存储器提供指示相位变化与输入数字信号的时钟周期的指示之间的最长间隔的位置的信号。 最长间隔检测器包括用于偶数和奇数相位转换的一对计数器,并且以多个间隔进行计数,使得可以从存在于SPDIF信号的前同步码X中的6 UI的最长脉冲直接恢复2个UI的时钟周期。

    Directory system
    4.
    发明申请
    Directory system 失效
    目录系统

    公开(公告)号:US20050102297A1

    公开(公告)日:2005-05-12

    申请号:US10705242

    申请日:2003-11-12

    Abstract: A directory system for providing directory services in a communications network, including a plurality of memory segments for storing respective subsets of directory data for each directory object. The memory segments include attribute segments, object segments, and directory information tree (DIT) segments for respectively storing attribute, management, and hierarchical structure data for directory objects. The directory system monitors usage of directory data stored in the memory segments and redistributes at least a portion of the directory data in the memory segments based on the observed usage to improve the performance of directory services. The directory system also provides transactional messaging services to users.

    Abstract translation: 一种用于在通信网络中提供目录服务的目录系统,包括用于存储每个目录对象的目录数据的相应子集的多个存储器段。 存储器段包括用于分别存储用于目录对象的属性,管理和层次结构数据的属性段,对象段和目录信息树(DIT)段。 目录系统监视存储在存储器段中的目录数据的使用,并基于观察到的使用重新分配存储器段中的目录数据的至少一部分,以提高目录服务的性能。 目录系统还向用户提供事务性消息传递服务。

    INTEGRATED CIRCUIT INTERFACE WITH LOCKING SIGNAL
    6.
    发明申请
    INTEGRATED CIRCUIT INTERFACE WITH LOCKING SIGNAL 有权
    具有锁定信号的集成电路接口

    公开(公告)号:US20070274424A1

    公开(公告)日:2007-11-29

    申请号:US11753286

    申请日:2007-05-24

    Applicant: Alan LLOYD

    Inventor: Alan LLOYD

    CPC classification number: H04J3/0605

    Abstract: An integrated circuit for recovering a position and clock period from an input bi-phase encoded digital signal, such as an SPDIF signal, has a longest interval detector arranged to count the intervals between phase changes of the input digital signal to derive the longest interval between the phase changes. The longest interval indicates the position and period length of a preamble portion of sub-frames of the signal. A store arranged to store the longest interval between phase changes and an output provides a signal indicating the position of the longest interval between phase changes and an indication of the clock period of the input digital signal. The longest interval detector includes a pair of counters for even and odd phase transitions and counts in multiple intervals such that a clock period of 2UI can be recovered directly from the longest pulse of 6UI present in the preamble X of an SPDIF signal.

    Abstract translation: 用于从诸如SPDIF信号的输入双相编码数字信号恢复位置和时钟周期的集成电路具有最长间隔检测器,其布置成对输入数字信号的相位变化之间的间隔进行计数,以导出第 相变。 最长间隔表示信号的子帧的前导码部分的位置和周期长度。 存储在相位变化和输出之间存储最长间隔的存储器提供指示相位变化与输入数字信号的时钟周期的指示之间的最长间隔的位置的信号。 最长间隔检测器包括用于偶数和奇数相位转换的一对计数器,并且以多个间隔进行计数,使得可以直接从SPDIF信号的前同步码X中存在的6UI的最长脉冲中恢复2UI的时钟周期。

    Method for recovering a position and clock period from an input digital signal
    7.
    发明授权
    Method for recovering a position and clock period from an input digital signal 有权
    从输入数字信号中恢复位置和时钟周期的方法

    公开(公告)号:US08000051B2

    公开(公告)日:2011-08-16

    申请号:US12580535

    申请日:2009-10-16

    Applicant: Alan Lloyd

    Inventor: Alan Lloyd

    CPC classification number: H04J3/0605

    Abstract: A method for recovering a position and clock period from an input bi-phase encoded digital signal such as an SPDIF signal counts the intervals between phase changes of the input digital signal to derive the longest interval between the phase changes. The longest interval indicates the position and period length of a preamble portion of sub-frames of the signal and is stored, and a signal indicating the position of the longest interval between phase changes and an indication of the clock period of the input digital signal is provided.

    Abstract translation: 用于从诸如SPDIF信号的输入双相编码数字信号恢复位置和时钟周期的方法对输入数字信号的相位变化之间的间隔进行计数,以导出相位变化之间的最长间隔。 最长间隔表示信号的子帧的前导部分的位置和周期长度,并被存储,并且指示相位改变之间的最长间隔的位置与输入数字信号的时钟周期的指示的信号是 提供。

    Hierarchical fair scheduling algorithm in a distributed measurement system
    9.
    发明授权
    Hierarchical fair scheduling algorithm in a distributed measurement system 失效
    分布式测量系统中的分层公平调度算法

    公开(公告)号:US07860918B1

    公开(公告)日:2010-12-28

    申请号:US11459834

    申请日:2006-07-25

    CPC classification number: H04L43/50

    Abstract: The present invention provides embodiments of a network monitoring system that includes a scheduling agent for generating groupings of test agents and scheduling network measurements to be performed by each test agent grouping. The system may provide identifiers to members of first and second sets of objects. Then, the system can generate first and second sequences of the identifiers for each of the first and second sets, respectively and associate the identifiers to provide a plurality of groupings of identifiers. Finally the system may schedule a corresponding event for each of the grouping of identifiers. The systems and methods present can require very little state memory, ensure fair coverage of the object groupings; and can avoid the problems associated with round robin scheduling.

    Abstract translation: 本发明提供了一种网络监视系统的实施例,其包括用于生成测试代理的分组的调度代理和由每个测试代理分组执行的调度网络测量。 系统可以向第一和第二组对象的成员提供标识符。 然后,系统可以分别为第一组和第二组中的每一个生成标识符的第一和第二序列,并且关联标识符以提供多个标识符分组。 最后,系统可以为每个标识符分组调度相应的事件。 存在的系统和方法可能需要很少的状态记忆,确保对象分组的公平覆盖; 并可以避免与循环调度相关的问题。

    ENERGY SAVING IN SYSTEMS-ON-CHIP
    10.
    发明申请
    ENERGY SAVING IN SYSTEMS-ON-CHIP 审中-公开
    节能系统中的节能

    公开(公告)号:US20100318822A1

    公开(公告)日:2010-12-16

    申请号:US12815004

    申请日:2010-06-14

    Abstract: A System-on-Chip may include initiators, targets exchanging information with the initiators, and a control module. The control module may be configured to selectively set to one of different reduced power consumption modes each of the initiators and each of the targets based upon external reduced power consumption instructions, and selectively wake-up from the reduced power consumption mode each initiator and each target.

    Abstract translation: 片上系统可以包括发起者,与发起者交换信息的目标,以及控制模块。 控制模块可以被配置为基于外部减少功耗指令,选择性地将每个启动器和每个目标设置为不同的降低的功耗模式之一,并且从降低的功耗模式中选择性地唤醒每个启动器和每个目标 。

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