Digital transmitter circuit and method of operation
    1.
    发明授权
    Digital transmitter circuit and method of operation 失效
    数字发射机电路及操作方法

    公开(公告)号:US06490440B1

    公开(公告)日:2002-12-03

    申请号:US09323236

    申请日:1999-06-01

    IPC分类号: H04B102

    CPC分类号: H04B1/0483 H04B1/406

    摘要: A transceiver (10) includes a transmitter (16) that receives a digital data stream from a digital signal processor (18) to delay lines (20, 30). The delay lines (20, 30) provide an address to a ROM look-up table (40). Another input of the look-up table (40) receives a signal that selects protocols such as TDMA, CDMA, and GSM. A multi-accumulator fractional-N synthesizer (48) receives phase derivative coefficients and a DAC (46) receives amplitude modulation coefficients from the look-up table (40) based on the selected protocol. The analog output signals from the DAC (46) and the synthesizer (48) are received by a variable gain amplifier (54) that generates an RF amplitude and frequency modulated output signal for transmission from the transmitter (16).

    摘要翻译: 收发器(10)包括从数字信号处理器(18)接收数字数据流以延迟线(20,30)的发射器(16)。 延迟线(20,30)向ROM查找表(40)提供地址。 查找表(40)的另一个输入接收选择诸如TDMA,CDMA和GSM之类的协议的信号。 多累加器分数N合成器(48)接收相位导数系数,并且DAC(46)基于所选择的协议从查找表(40)接收幅度调制系数。 来自DAC(46)和合成器(48)的模拟输出信号被可变增益放大器(54)接收,该可变增益放大器产生用于从发送器(16)传输的RF幅度和调频输出信号。

    Method for extending the liner range of an amplifier
    2.
    发明授权
    Method for extending the liner range of an amplifier 有权
    扩展放大器的线性范围的方法

    公开(公告)号:US06259318B1

    公开(公告)日:2001-07-10

    申请号:US09322048

    申请日:1999-05-28

    IPC分类号: H03G320

    摘要: A transceiver (10) includes a transmitter (16) that receives a digital data stream from a digital signal processor (18) to delay lines (20, 30). The delay lines (20,30) provide an address to a ROM look-up table (40). Another input of the look-up table (40) receives a signal that selects protocols such as TDMA, CDMA, and GSM. A multi-accumulator fractional-N synthesizer (48) receives phase derivative coefficients and a DAC (46) receives amplitude modulation coefficients from the look-up table (40) based on the selected protocol. The analog output signals from the DAC (46) and the synthesizer (48) are received by a variable gain amplifier (54) that generates an RF amplitude and frequency modulated output signal for transmission from the transmitter (16). The look-up table (40) stores phase derivative coefficients and amplitude modulation coefficients that correct for non-linearity in the variable gain amplifier (54).

    摘要翻译: 收发器(10)包括从数字信号处理器(18)接收数字数据流以延迟线(20,30)的发射器(16)。 延迟线(20,30)向ROM查找表(40)提供地址。 查找表(40)的另一个输入接收选择诸如TDMA,CDMA和GSM之类的协议的信号。 多累加器分数N合成器(48)接收相位导数系数,并且DAC(46)基于所选择的协议从查找表(40)接收幅度调制系数。 来自DAC(46)和合成器(48)的模拟输出信号被可变增益放大器(54)接收,该可变增益放大器产生用于从发送器(16)传输的RF幅度和调频输出信号。 查找表(40)存储在可变增益放大器(54)中校正非线性的相位微分系数和幅度调制系数。

    Circuit and method for processing data
    3.
    发明授权
    Circuit and method for processing data 有权
    电路和数据处理方法

    公开(公告)号:US06868431B1

    公开(公告)日:2005-03-15

    申请号:US09426670

    申请日:1999-10-25

    IPC分类号: H03H17/06 G06F17/10

    CPC分类号: H03H17/06

    摘要: A Finite Impulse Response (FIR) filter circuit (60) includes delay elements (63, 64, 66), multipliers (71, 72, 73, 74), a summing device (78), and a digital integrator (69) at the output of the FIR filter circuit (60). A method for processing data using the FIR filter circuit (60) includes differentially encoding data prior to storing or processing of the data. The method provides a technique for compressing data since less memory is needed to store derivative data. The method further includes integrating the derivative data using the digital integrator (69) to decompress the derivative data.

    摘要翻译: 有限脉冲响应(FIR)滤波器电路(60)包括延迟元件(63,64,66),乘法器(71,72,73,74),求和装置(78)和数字积分器(69) 输出FIR滤波器电路(60)。 使用FIR滤波器电路(60)处理数据的方法包括在存储或处理数据之前对数据进行差分编码。 该方法提供了一种用于压缩数据的技术,因为需要更少的存储器来存储导数数据。 该方法还包括使用数字积分器(69)积分导数数据以解压缩导数数据。

    Method and apparatus for equallization in an asymmetric digital
aubscriber line communications system
    4.
    发明授权
    Method and apparatus for equallization in an asymmetric digital aubscriber line communications system 失效
    用于非对称数字订户通信系统中的均衡的方法和装置

    公开(公告)号:US6047025A

    公开(公告)日:2000-04-04

    申请号:US23061

    申请日:1998-02-13

    CPC分类号: H03H21/0012

    摘要: An equalizer (106, 146) for use in systems such as an asymmetric digital subscriber line (ADSL) transceiver (5) reduces the number of calculations required for updating the equalizer coefficients. The equalizer (106, 146) takes advantage of the substantially symmetrical phase and amplitude distortion of the signal constellation, which causes both the amplitude and the phase relationship of the calculated error term for each constellation point to be equal. Instead of performing a full complex multiplication, the equalizer (106, 146) uses some but not all of the product terms between the real and imaginary components of the calculated error term and the conjugate of the received data estimate in the coefficient update calculation. The result is then scaled to account for the missing terms. The resulting equalizer (106, 146) requires fewer calculations for coefficient updating.

    摘要翻译: 用于诸如非对称数字用户线(ADSL)收发器(5)的系统中的均衡器(106,146)减少了更新均衡器系数所需的计算次数。 均衡器(106,146)利用信号星座图的基本对称的相位和幅度失真,这导致每个星座点的计算出的误差项的幅度和相位关系都相等。 代替执行全复数乘法,均衡器(106,146)在系数更新计算中使用计算出的误差项的实部和虚分量之间的一些但不是全部乘积项和接收到的数据估计的共轭。 然后将结果缩小以考虑缺少的术语。 所得到的均衡器(106,146)需要更少的系数更新计算。

    Circuit and method of extending the linear range of a phase frequency
detector
    5.
    发明授权
    Circuit and method of extending the linear range of a phase frequency detector 有权
    扩展相位频率检测器的线性范围的电路和方法

    公开(公告)号:US6100721A

    公开(公告)日:2000-08-08

    申请号:US241669

    申请日:1999-02-01

    摘要: A wireless communication system (10) uses a phase detector (28) having a first pair of flip-flops (50, 56) for detecting the phase difference between an input frequency and a reference frequency. The first pair of flip-flops control current sources (66, 70) in the charge pump of the phase detector to modulate the error signal. A second pair of flip-flops (52, 58) detect when the input frequency is more than 2.pi. ahead of or behind the reference frequency. The second pair of flip-flops increment and decrement a counter (54) which in turn controls additional current sources (78-88) in the charge pump. The additional current sources extend the linear operating range of the error signal when the phase error exceeds .+-.2.pi..

    摘要翻译: 无线通信系统(10)使用具有用于检测输入频率和参考频率之间的相位差的第一对触发器(50,56)的相位检测器(28)。 第一对触发器控制相位检测器的电荷泵中的电流源(66,70),以调制误差信号。 第二对触发器(52,58)检测输入频率何时超过参考频率之前或之后的2π。 第二对触发器增加和减少计数器(54),反过来控制电荷泵中的附加电流源(78-88)。 当相位误差超过+/- 2 pi时,额外的电流源扩展了误差信号的线性工作范围。

    Trajectory directed timing recovery
    6.
    发明授权
    Trajectory directed timing recovery 失效
    轨迹定向恢复

    公开(公告)号:US5528634A

    公开(公告)日:1996-06-18

    申请号:US154057

    申请日:1993-11-18

    IPC分类号: H04L7/02 H04L27/233 H04L7/00

    CPC分类号: H04L7/0062 H04L27/2332

    摘要: In a digital demodulator (10) a single sampling moment (28) occurs within each symbol (22). A data estimator (34) identifies a data code and a phase error for each symbol. The data from three symbols (22) are compared to identify whether a phase trajectory is determinate or indeterminate. The phase error from a current symbol is combined with phase trajectory direction data to determine whether a current phase error is in a direction of a next data code or a previous data code. When determinate trajectories are found, phase errors in the direction of a next data code urge the sample moment (28) to occur earlier in the symbols (22) and phase errors in the direction of a previous data code urge the sample moment (28) to occur later in each symbol (22). When indeterminate trajectories are found, substantially no influence is exerted over the timing of the sample moment (28).

    摘要翻译: 在数字解调器(10)中,在每个符号(22)内发生单个采样时刻(28)。 数据估计器(34)识别每个符号的数据代码和相位误差。 比较来自三个符号(22)的数据,以确定相位轨迹是确定的还是不确定的。 来自当前符号的相位误差与相位轨迹方向数据组合,以确定当前相位误差是否在下一数据码或先前数据码的方向上。 当发现确定的轨迹时,在下一个数据码的方向上的相位误差促使采样时刻(28)在符号(22)中更早地发生,并且先前数据码的方向上的相位误差迫使采样时刻(28) 以后发生在每个符号(22)中。 当发现不确定的轨迹时,基本上不会对样本力矩(28)的定时施加影响。