公开(公告)号：US5103394A

公开(公告)日：1992-04-07

申请号：US455805

申请日：1989-12-21

申请人： Andrew J. Blasciak

发明人： Andrew J. Blasciak

IPC分类号： G06F11/32 ,  G06F11/34 ,  G06F11/36

CPC分类号： G06F11/3419 ,  G06F11/348 ,  G06F11/32 ,  G06F11/3447 ,  G06F11/3612 ,  G06F11/3648 ,  G06F2201/86 ,  G06F2201/88

摘要： A software performance analyzer nonintrusively measures six different aspects of software execution. These include histograms or a table indicating the degree of memory activity within a collection of specified address ranges, or indicating the amount of memory or bus activity caused by the execution of programming fetched from within a collection of specified ranges, or indicating for a specified program the relative frequency with which it actually executes in specified lengths of time, or indicating for a specified program the relative frequency of a collection of specified available potential execution times (i.e., the complement of the previous measurement), or indicating for two specified programs the relative frequency of a specified collection time intervals between the end of one of the programs and the start of the other, or lastly, indicating the number of transitions between selected pair of programs. All measurements may be either percentages relative to only the specified programs or ranges, or may be absolute percentages with respect to all activity occurring during the measurement. Acquired data may be in terms of time or of qualified occurrences of a specified event. Enable/disable and windowing for context recognition are available. The measurements are made by randomly choosing and monitoring a first range for a selected period of time. An address range detector and bus status recognize supply information to a state machine configured to control the particular type of measurement desired. Various counters are responsive to the state machine and accumulate data later reduced by software controlling the software performance analyzer. At the end of the monitoring period the next address range is monitored, and so on until the entire list has been used, whereupon a new random starting range is chosen and the measurement continues. The first two types of measurements listed above may also be performed in a real-time mode where two ranges are in fact monitored simultaneously and nearly continuously.

公开(公告)号：US4845615A

公开(公告)日：1989-07-04

申请号：US106947

申请日：1987-10-14

申请人： Andrew J. Blasciak

发明人： Andrew J. Blasciak

IPC分类号： G06F11/32 ,  G06F11/34 ,  G06F11/36

CPC分类号： G06F11/3419 ,  G06F11/348 ,  G06F11/32 ,  G06F11/3447 ,  G06F11/3612 ,  G06F2201/86 ,  G06F2201/865 ,  G06F2201/88

摘要： A software performance analyzer nonintrusively measures six different aspects of software execution. These include histograms or a table indicating the degree of memory activity within a collection of specified address ranges, or indicating the amount of memory of bus activity caused by the execution of programming fetched from within a collection of specified ranges, or indicating for a specified program the relative frequency with which it actually executes in specified lengths of time, or indicating for a specified program the relative frequency of a collection of specified available potential execution times (i.e., the complement of the previous measurement), or indicating for two specified programs the relative frequency of a specified collection time intervals between the end of one of the programs and the start of the other, or lastly, indicating the number of transitions between selected pairs of programs. All measurements may be either percentages relative to only the specified programs or ranges, or may be absolute percentages with respect to all activity occurring during the measurement. Acquired data may be in terms of time or of qualified occurrences of a specified event. Enable/disable and windowing for context recognition are available. The measurements are made by rendomly choosing and monitoring a first range for a selected period of time. An address range detector and bus status recognizer supply information to a state machine configured to control the particular type of measurement desired. Various counters are responsive to the state machine and accumulate data later reduced by software controlling the software performance analyzer. At the end of the monitoring period the next address range is monitored, and so on until the entire list has been used, whereupon a new random starting range is chosen and the measurement continues. The first two types of measurements listed above may also be performed in a real-time mode where two ranges are in fact monitored simultaneously and nearly continuously.

公开(公告)号：US5732407A

公开(公告)日：1998-03-24

申请号：US570033

申请日：1995-12-11

申请人： William R. Mason ,  Rodney H. Orgill ,  Andrew J. Blasciak

发明人： William R. Mason ,  Rodney H. Orgill ,  Andrew J. Blasciak

IPC分类号： G11C11/41 ,  G01R31/3185 ,  G11C7/00 ,  G11C7/10 ,  H03K19/177 ,  G06F12/00

CPC分类号： H03K19/1776 ,  G01R31/318516 ,  G11C7/1006 ,  G11C7/1036 ,  G11C7/1045 ,  H03K19/17704

摘要： A programmable logic device having a configurable random access memory (RAM) integrated on a single integrated circuit chip. The configurable RAM has a user selectable logical configuration. In operation, the RAM in accordance with the present invention is addressed by a system address bus and data is provided using a system data bus. The memory array can also be addressed by a control address bus and data read out and loaded into the RAM using a control data bus.

摘要翻译： 具有集成在单个集成电路芯片上的可配置随机存取存储器（RAM）的可编程逻辑器件。 可配置的RAM具有用户可选的逻辑配置。 在操作中，根据本发明的RAM由系统地址总线寻址，并且使用系统数据总线提供数据。 存储器阵列还可以通过控制地址总线寻址，并且使用控制数据总线读出并加载到RAM中的数据。

公开(公告)号：US5450586A

公开(公告)日：1995-09-12

申请号：US876346

申请日：1992-04-30

申请人： Eric J. Kuzara ,  Andrew J. Blasciak ,  Greg S. Parets

发明人： Eric J. Kuzara ,  Andrew J. Blasciak ,  Greg S. Parets

IPC分类号： G06F11/28 ,  G06F9/06 ,  G06F11/34 ,  G06F11/36 ,  G06F7/00

CPC分类号： G06F11/3624 ,  G06F11/3466 ,  G06F11/3636 ,  G06F11/3644

摘要： A system for inserting code markers for observing indications (external to the microprocessor upon which the software operates) of the occurrence of an event in the execution of the software. Additional instructions or markers are added to the software to be debugged to produce simple, encoded, memory references to otherwise unused memory or I/O locations that will always be visible to a logic analyzer as bus cycles. Although the code markers cause a minimal intrusion in the underlying software, they make tracing events by a conventional logic analyzer much simpler and allow for performance evaluations in manners not heretofore possible. The inserted code markers provide a method of dynamically extracting information from a running host or real-time "black box" embedded system under test using simple low intrusion print statements, encoded I/O writes on procedure entries and exits, and/or an interface to service calls and the like which writes out the passed parameters. The code markers are inserted at compile time or interactively during the debug session to make visible critical points in the code execution, such as function calls, task creation and semaphore operations, so as to speed isolation of problems at test points during debugging. Performance analysis and event analysis use the code markers to cut through the ambiguities of microprocessor prefetch and cache operations. Because of these features, the invention is particularly advantageous for use by software design teams developing complex embedded host or real-time operating systems using multi-task operating systems and/or object oriented systems.

摘要翻译： 一种用于插入代码标记的系统，用于在执行软件时观察事件发生的观察指示（软件在其上的微处理器的外部）。 额外的指令或标记被添加到要调试的软件中，以产生简单的，编码的存储器引用，否则未使用的存储器或I / O位置，总是作为总线周期对逻辑分析仪可见。 尽管代码标记在底层软件中引起了最小的入侵，但是它们通过常规逻辑分析仪使跟踪事件变得更简单，并且允许以前所未有的方式进行性能评估。 插入的代码标记提供了一种从正在运行的主机或正在测试的实时“黑箱”嵌入式系统中使用简单的低入侵打印语句，过程条目和出口处的编码I / O写入和/或接口动态提取信息的方法 来处理写出传递的参数的呼叫等。 代码标记在编译时被插入或在调试会话期间交互地插入，以便在代码执行中形成可视的关键点，例如函数调用，任务创建和信号量操作，以便在调试期间加快测试点处的问题的隔离。 性能分析和事件分析使用代码标记来切断微处理器预取和缓存操作的不确定性。 由于这些特征，本发明特别有利于软件设计团队开发使用多任务操作系统和/或面向对象系统的复杂嵌入式主机或实时操作系统。