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公开(公告)号：US20110267210A1
公开(公告)日：2011-11-03
申请号：US12769629
申请日：2010-04-28
申请人： Lars Risbo , Rahmi Hezar , Burak Kelleci , Anker Bjoern-Josefsen
发明人： Lars Risbo , Rahmi Hezar , Burak Kelleci , Anker Bjoern-Josefsen
CPC分类号： H03M7/3006 , H03M1/0668 , H03M1/74 , H03M3/502
摘要： A signal converting system is described that has a multi-segment digital to analog converter coupled to one or more error shaping loops. Each error shaping loop includes a quantizer with a feedback loop configured to generate a control signal responsive to a stream of symbols and to an error signal. Each error shaping loop also includes an inter-symbol-interference (ISI) shaping loop coupled to receive the control signal and to produce an ISI portion of the error signal that is responsive to inter-symbol transition rate.
摘要翻译： 描述了具有耦合到一个或多个错误整形环路的多段数模转换器的信号转换系统。 每个错误整形循环包括具有反馈回路的量化器，其被配置为响应于符号流和误差信号产生控制信号。 每个错误整形环路还包括码元间干扰（ISI）整形环路，其被耦合以接收控制信号并产生响应于符号间转换速率的误差信号的ISI部分。
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2.发明申请ON-THE-FLY INTRODUCTION OF INTER-CHANNEL DELAY IN A PULSE-WIDTH-MODULATION AMPLIFIER 审中-公开脉冲宽度调制放大器中的通道间延迟的简单介绍公开(公告)号：US20090116654A1
公开(公告)日：2009-05-07
申请号：US12351627
申请日：2009-01-09
IPC分类号： H04R5/00
CPC分类号： H03F3/2173 , H03F3/211 , H03F3/68 , H03F2200/331
摘要： A multiple-channel audio processor (10) and an associated plurality of power stages (22) in an audio system are disclosed. The audio processor (10) includes a plurality of audio amplifier channels (22), each of which includes a pulse-code-modulation (PCM) to pulse-width-modulation (PWM) conversion function (25), which generates PWM signals for application to the plurality of power stages (22). The audio amplifier channels (20) each also include an interchannel delay function (28) for delaying the PWM edges relative to other channels (20), for reducing noise. The audio amplifier channels (20) each also include delay adjust circuitry (32) for gradually increasing and decreasing the interchannel delay of the channel (20) on startup and shutdown. This permits a single control terminal (VALID) at the processor to globally enable and disable all of the power stages (22).
摘要翻译： 公开了音频系统中的多声道音频处理器（10）和相关联的多个功率级（22）。 音频处理器（10）包括多个音频放大器通道（22），每个音频放大器通道包括脉冲编码调制（PCM）到脉冲宽度调制（PWM）转换功能（25），其产生用于 应用于多个功率级（22）。 音频放大器通道（20）每个还包括用于相对于其它通道（20）延迟PWM边沿的通道间延迟功能（28），以减少噪声。 音频放大器通道（20）还包括延迟调整电路（32），用于在启动和关闭时逐渐增加和减少通道（20）的通道间延迟。 这允许处理器处的单个控制终端（VALID）全局地启用和禁用所有功率级（22）。
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公开(公告)号：US08144043B2
公开(公告)日：2012-03-27
申请号：US12769629
申请日：2010-04-28
申请人： Lars Risbo , Rahmi Hezar , Burak Kelleci , Anker Bjoern-Josefsen
发明人： Lars Risbo , Rahmi Hezar , Burak Kelleci , Anker Bjoern-Josefsen
IPC分类号： H03M1/66
CPC分类号： H03M7/3006 , H03M1/0668 , H03M1/74 , H03M3/502
摘要： A signal converting system is described that has a multi-segment digital to analog converter coupled to one or more error shaping loops. Each error shaping loop includes a quantizer with a feedback loop configured to generate a control signal responsive to a stream of symbols and to an error signal. Each error shaping loop also includes an inter-symbol-interference (ISI) shaping loop coupled to receive the control signal and to produce an ISI portion of the error signal that is responsive to inter-symbol transition rate.
摘要翻译： 描述了具有耦合到一个或多个错误整形环路的多段数模转换器的信号转换系统。 每个错误整形循环包括具有反馈回路的量化器，其被配置为响应于符号流和误差信号产生控制信号。 每个错误整形环路还包括码元间干扰（ISI）整形环路，其被耦合以接收控制信号并产生响应于符号间转换速率的误差信号的ISI部分。
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