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公开(公告)号:US08069302B2
公开(公告)日:2011-11-29
申请号:US12830001
申请日:2010-07-02
申请人: Menahem Lasser , Mark Murin , Arik Eyal
发明人: Menahem Lasser , Mark Murin , Arik Eyal
IPC分类号: G06F13/14
CPC分类号: G11C11/5621 , G06F12/0246 , G06F12/0866 , G06F2212/2022 , G06F2212/7211 , G11C16/349 , G11C16/3495 , G11C2211/5641
摘要: A flash memory storage system includes a memory array containing a plurality of memory cells and a controller for controlling the flash memory array. The controller dedicates a first group of memory cells to operate with a first number of bits per cell and a second, separate group of memory cells to operate with a second number of bits per cell. A mechanism is provided to apply wear leveling techniques separately to the two groups of cells to evenly wear out the memory cells.
摘要翻译: 闪速存储器存储系统包括包含多个存储器单元的存储器阵列和用于控制闪速存储器阵列的控制器。 控制器专用于第一组存储器单元以每个单元的第一个位数和第二个单独的存储器单元组以每个单元的第二个位数来操作。 提供了一种机制来将磨损均衡技术分别应用于两组细胞以均匀地磨损存储单元。
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公开(公告)号:US07644224B2
公开(公告)日:2010-01-05
申请号:US11450443
申请日:2006-06-12
申请人: Mark Murin , Arik Eyal
发明人: Mark Murin , Arik Eyal
IPC分类号: G06F12/02
CPC分类号: G11C16/26
摘要: A flash memory device includes an array of memory cells for storing data pages, one or more buffers for retrieving the data pages and a logic mechanism that, responsive to a plurality of commands, transfers the data pages between the buffers and a host. Each command subsequent to a first command instructs retrieval of a data page whose address either precedes, or exceeds by more than 1, the address of the data page retrieved by the immediately preceding command, and at least one command does not explicitly specify the address of its retrieved data page. Another similar flash memory device uses two buffers to implement cache reads of data pages whose addresses are specified arbitrarily in the commands subsequent to the first command.
摘要翻译: 闪速存储器件包括用于存储数据页的存储器单元阵列,用于检索数据页的一个或多个缓冲器以及响应于多个命令在缓冲器和主机之间传送数据页的逻辑机构。 第一命令之后的每个命令指示检索其地址在先前或超过1以上的数据页面,该数据页面由紧接在前的命令检索到的数据页面的地址,并且至少一个命令没有明确地指定 其检索的数据页面。 另一个类似的闪存设备使用两个缓冲器来实现在第一命令之后的命令中任意指定其地址的数据页的高速缓存读取。
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公开(公告)号:US07752382B2
公开(公告)日:2010-07-06
申请号:US11318906
申请日:2005-12-28
申请人: Menahem Lasser , Mark Murin , Arik Eyal
发明人: Menahem Lasser , Mark Murin , Arik Eyal
IPC分类号: G06F13/14
CPC分类号: G11C11/5621 , G06F12/0246 , G06F12/0866 , G06F2212/2022 , G06F2212/7211 , G11C16/349 , G11C16/3495 , G11C2211/5641
摘要: A flash memory storage system includes a memory array containing a plurality of memory cells and a controller for controlling the flash memory array. The controller dedicates a first group of memory cells to operate with a first number of bits per cell and a second, separate group of memory cells to operate with a second number of bits per cell. A mechanism is provided to apply wear leveling techniques separately to the two groups of cells to evenly wear out the memory cells.
摘要翻译: 闪速存储器存储系统包括包含多个存储器单元的存储器阵列和用于控制闪速存储器阵列的控制器。 控制器专用于第一组存储器单元以每个单元的第一个位数和第二个单独的存储器单元组以每个单元的第二个位数来操作。 提供了一种机制来将磨损均衡技术分别应用于两组细胞以均匀地磨损存储单元。
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公开(公告)号:US20070113000A1
公开(公告)日:2007-05-17
申请号:US11450443
申请日:2006-06-12
申请人: Mark Murin , Arik Eyal
发明人: Mark Murin , Arik Eyal
IPC分类号: G06F12/00
CPC分类号: G11C16/26
摘要: A flash memory device includes an array of memory cells for storing data pages, one or more buffers for retrieving the data pages and a logic mechanism that, responsive to a plurality of commands, transfers the data pages between the buffers and a host. Each command subsequent to a first command instructs retrieval of a data page whose address either precedes, or exceeds by more than 1, the address of the data page retrieved by the immediately preceding command, and at least one command does not explicitly specify the address of its retrieved data page. Another similar flash memory device uses two buffers to implement cache reads of data pages whose addresses are specified arbitrarily in the commands subsequent to the first command.
摘要翻译: 闪速存储器件包括用于存储数据页的存储器单元阵列,用于检索数据页的一个或多个缓冲器以及响应于多个命令在缓冲器和主机之间传送数据页的逻辑机构。 第一命令之后的每个命令指示检索其地址在先前或超过1以上的数据页面,该数据页面由紧接在前的命令检索到的数据页面的地址,并且至少一个命令没有明确地指定 其检索的数据页面。 另一个类似的闪存设备使用两个缓冲器来实现在第一命令之后的命令中任意指定其地址的数据页的高速缓存读取。
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公开(公告)号:US20100274955A1
公开(公告)日:2010-10-28
申请号:US12830001
申请日:2010-07-02
申请人: Menahem Lasser , Mark Murin , Arik Eyal
发明人: Menahem Lasser , Mark Murin , Arik Eyal
CPC分类号: G11C11/5621 , G06F12/0246 , G06F12/0866 , G06F2212/2022 , G06F2212/7211 , G11C16/349 , G11C16/3495 , G11C2211/5641
摘要: A flash memory storage system includes a memory array containing a plurality of memory cells and a controller for controlling the flash memory array. The controller dedicates a first group of memory cells to operate with a first number of bits per cell and a second, separate group of memory cells to operate with a second number of bits per cell. A mechanism is provided to apply wear leveling techniques separately to the two groups of cells to evenly wear out the memory cells.
摘要翻译: 闪速存储器存储系统包括包含多个存储器单元的存储器阵列和用于控制闪速存储器阵列的控制器。 控制器专用于第一组存储器单元以每个单元的第一个位数和第二个单独的存储器单元组以每个单元的第二个位数来操作。 提供了一种机制来将磨损均衡技术分别应用于两组细胞以均匀地磨损存储单元。
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公开(公告)号:US20070061502A1
公开(公告)日:2007-03-15
申请号:US11318906
申请日:2005-12-28
申请人: Menahem Lasser , Mark Murin , Arik Eyal
发明人: Menahem Lasser , Mark Murin , Arik Eyal
IPC分类号: G06F12/00
CPC分类号: G11C11/5621 , G06F12/0246 , G06F12/0866 , G06F2212/2022 , G06F2212/7211 , G11C16/349 , G11C16/3495 , G11C2211/5641
摘要: A flash memory storage system includes a memory array containing a plurality of memory cells and a controller for controlling the flash memory array. The controller dedicates a first group of memory cells to operate with a first number of bits per cell and a second, separate group of memory cells to operate with a second number of bits per cell. A mechanism is provided to apply wear leveling techniques separately to the two groups of cells to evenly wear out the memory cells.
摘要翻译: 闪速存储器存储系统包括包含多个存储器单元的存储器阵列和用于控制闪速存储器阵列的控制器。 控制器专用于第一组存储器单元以每个单元的第一个位数和第二个单独的存储器单元组以每个单元的第二个位数来操作。 提供了一种机制来将磨损均衡技术分别应用于两组细胞以均匀地磨损存储单元。
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