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1.
公开(公告)号:US07669028B2
公开(公告)日:2010-02-23
申请号:US11348884
申请日:2006-02-07
CPC分类号: G06F13/1689
摘要: Embodiments of the present invention optimize data bandwidth across an asynchronous buffer in a system with a variable clock domain. A move signal may be asserted to transfer data associated with a command into the asynchronous buffer. After the data has been moved into the buffer, an acknowledge signal may indicate that the transfer is complete. A launch signal may transfer the data in the asynchronous buffer to memory. Embodiments of the present invention allow the processing of a next command to begin at the earliest possible time while data associated with a previous command is being transferred into and out of the buffer, thereby increasing throughput and improving performance.
摘要翻译: 本发明的实施例通过具有可变时钟域的系统中的异步缓冲器来优化数据带宽。 可以断言移动信号将与命令相关联的数据传送到异步缓冲器。 数据移入缓冲区后,确认信号可能表示传输完成。 发射信号可以将异步缓冲器中的数据传输到存储器。 本发明的实施例允许下一个命令的处理在尽可能早的时间开始,而与先前命令相关联的数据正被传入和传出缓冲器,从而提高吞吐量并提高性能。
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2.
公开(公告)号:US08213428B2
公开(公告)日:2012-07-03
申请号:US10625954
申请日:2003-07-24
IPC分类号: H04L12/56
CPC分类号: H04L49/3009
摘要: A method is provided for address mapping in a network processor. The method includes the steps of (1) determining a port number of a port that receives a data cell; (2) determining a virtual path identifier and a virtual channel identifier for the data cell; and (3) creating a first index based on at least one of the port number, the virtual path identifier and the virtual channel identifier. The method further includes (1) accessing one of a plurality of entries stored in a first on-chip memory using the first index; (2) creating a second index based on the accessed entry of the first on-chip memory; and (3) accessing an entry of a second memory based on the second index. Numerous other aspects are provided.
摘要翻译: 提供了一种用于网络处理器中的地址映射的方法。 该方法包括以下步骤:(1)确定接收数据信元的端口的端口号; (2)确定数据信元的虚拟路径标识符和虚拟信道标识符; 以及(3)基于端口号,虚拟路径标识符和虚拟信道标识符中的至少一个来创建第一索引。 该方法还包括:(1)使用第一索引访问存储在第一片上存储器中的多个条目中的一个; (2)基于所访问的第一片上存储器的条目创建第二索引; 和(3)基于第二索引访问第二存储器的条目。 提供了许多其他方面。
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公开(公告)号:US07225097B2
公开(公告)日:2007-05-29
申请号:US11191418
申请日:2005-07-28
IPC分类号: G06F17/00
CPC分类号: G11C29/50 , G11C29/028 , G11C2029/0407 , G11C2029/0409 , G11C2029/4402 , G11C2207/2254
摘要: In a first aspect, a first method is provided for adjusting memory system calibration. The first method includes the steps of (1) while in a first operating state, calibrating the memory system using a first amount of calibration data so that functional data may be read from and written to memory of the memory system; and (2) while in a second operating state, calibrating the memory system using a second amount of calibration data so that functional data may be read from and written to the memory, wherein the second amount of calibration data is smaller than the first amount of calibration data. Numerous other aspects are provided.
摘要翻译: 在第一方面,提供了一种用于调整存储器系统校准的方法。 第一种方法包括以下步骤:(1)在第一操作状态下,使用第一量的校准数据校准存储器系统,使得功能数据可以从存储器系统的存储器中读出并写入存储器系统; 和(2)在第二操作状态下,使用第二量的校准数据校准存储器系统,使得功能数据可以从存储器中读出并写入存储器,其中第二量的校准数据小于第一量的校准数据 校准数据。 提供了许多其他方面。
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