公开(公告)号：US20060116840A1

公开(公告)日：2006-06-01

申请号：US11257773

申请日：2005-10-25

申请人： Jonathan Hops ,  Brian Swing ,  John Pane ,  Bruce Sudweeks ,  Brian Phelps ,  James Kinslow

发明人： Jonathan Hops ,  Brian Swing ,  John Pane ,  Bruce Sudweeks ,  Brian Phelps ,  James Kinslow

IPC分类号： G01R27/28

CPC分类号： G01R31/31703 ,  G01R31/31932 ,  H04L43/50

摘要： A method and system is provided for detecting and correcting non-deterministic data that provides substantially real-time validation results and maximizes flexibility for the device manufacturer while reducing test costs. The automatic test apparatus and method can correct non-determinism caused by cycle slipping at the beginning of data transmission, between packets of data being transmitted and out-of-order data types of non-determinism. A data validation circuit is coupled to the receiver for validating the packet data based on expected packet data stored in a vector memory.

公开(公告)号：US20070214397A1

公开(公告)日：2007-09-13

申请号：US11800620

申请日：2007-05-07

申请人： Brian Phelps ,  Jacob Scherb ,  Jonathan Hops

发明人： Brian Phelps ,  Jacob Scherb ,  Jonathan Hops

IPC分类号： G01R31/28

CPC分类号： G06F11/263

摘要： A method for testing semiconductor devices that output non-deterministic entity information such as packet and control signals is disclosed. The method includes the steps generating test signals with a semiconductor tester and applying the generated test signals to the device-under-test. Actual output entities from the DUT in response to the applied generated test signals are captured by the tester and compared to expected output entities. If a failure is identified in the comparing step, the method defines a window of valid expected entities and compares the failed actual output entity to the window of valid expected entities. If a match occurs between the failed actual output entity and any of the expected entities in the window, the actual entity is deemed valid.