Isolation formation process with active area protection
    1.
    发明授权
    Isolation formation process with active area protection 失效
    隔离形成过程具有有源面积保护

    公开(公告)号:US4729816A

    公开(公告)日:1988-03-08

    申请号:US271

    申请日:1987-01-02

    CPC分类号: H01L21/76202

    摘要: An isolation formation process that minimizes bird's beak encroachment and preserves gate oxide integrity in the active region. Future active areas are protected by a structure having a central protective material layer, such as a thermal oxide, surrounded by a ring of thermal nitride. The thermal nitride and central protective material are coated by active region protection masking covers. In one embodiment, the masking covers include sidewalls over the thermal nitride ring. In another embodiment, the central protective material layer is overetched beneath an undercut covering layer to provide an undercut filled by the sidewall. All of these features contribute to bird's beak encroachment prevention which may be narrowed to as little as 0.07 microns per side.

    摘要翻译: 隔离形成过程使鸟喙侵入最小化,并保持活性区域中的栅极氧化物完整性。 未来的活性区域由具有中间保护材料层的结构保护,例如热氧化物,被热氮化物环围绕。 热氮化物和中心保护材料由有源区域保护掩蔽罩覆盖。 在一个实施例中,掩模覆盖物包括在氮化物氮化物环上的侧壁。 在另一个实施例中,中心保护材料层在底切覆盖层下面被过蚀刻,以提供由侧壁填充的底切。 所有这些功能都有助于鸟的喙侵入预防,每侧可以缩小到0.07微米。

    Multilayer trench isolation process and structure
    2.
    发明授权
    Multilayer trench isolation process and structure 失效
    多层沟槽隔离工艺及结构

    公开(公告)号:US4871689A

    公开(公告)日:1989-10-03

    申请号:US290809

    申请日:1988-12-23

    IPC分类号: H01L21/314 H01L21/762

    CPC分类号: H01L21/76229 H01L21/3145

    摘要: Dielectric filled isolation walls for semiconductor devices and integrated circuits of improved characteristics and ease of manufacture are formed by etching trenches in a semiconductor substrate and refilling the trenches with multiple layers of silicon oxy-nitride. Alternative oxygen rich and nitrogen rich oxy-nitride layers are used. For the narrowest trenches two layers suffice. Where trenches of different widths are present the wider trenches receive multiple layer pairs. A cap layer of oxy-nitride is added to insure filling of any trench intersections. The oxy-nitride desirably has a composition Si.sub.x O.sub.y N.sub.z where x, y, and z are in the range 0.25-0.4, 0.27-0.6, and 0.0-0.35, respectively, for the oxygen rich material and where x, y, and z are in the range 0.34-0.43 m 0.0-0.35, and 0.28-0.6, respectively, for the nitrogen rich material, expressed in atomic fraction and x+y+z=1. Both compositions of oxy-nitride are formed in the same LPCVD reactor by changing the conditions during layer deposition.

    摘要翻译: 通过蚀刻半导体衬底中的沟槽并用多层氮氧化硅再填充沟槽,形成具有改善的特性和易于制造的用于半导体器件和集成电路的介电填充隔离壁。 使用富氧和富氮的氧氮化物层。 对于最窄的沟槽,两层就够了。 在存在不同宽度的沟槽的情况下,较宽的沟槽接收多层对。 添加氮氧化物的盖层以确保填充任何沟槽交点。 氧氮化合物理想地具有组成为SixOyNz,其中x,y和z分别为富氧材料的0.25-0.4,0.27-0.6和0.0-0.35,并且其中x,y和z在 对于富含氮的材料,分别为0.34-0.43μm0.0-0.35和0.28-0.6,以原子分数表示,x + y + z = 1。 通过在层沉积期间改变条件,在相同的LPCVD反应器中形成氮氧化物的两种组成。

    CMOS process
    3.
    发明授权
    CMOS process 失效
    CMOS工艺

    公开(公告)号:US4717683A

    公开(公告)日:1988-01-05

    申请号:US910927

    申请日:1986-09-23

    摘要: A process is disclosed for fabricating complementary insulated gate field effect transistors including doped field isolation regions and optional punch through protection. In one embodiment of invention, a silicon substrate is provided which has N-type and P-type surface regions. First and second masks are formed overlying active areas of the two surface regions. A third mask is then formed overlying the first region and the first mask. P-type impurities are implanted into the second region with an implant energy which is sufficient to penetrate through the second mask but insufficient to penetrate through the third mask. A second P-type implant is performed with an implant energy insufficient to penetrate through either mask. The first implant will aid in preventing punch through while the second implant dopes the field region. A fourth mask is then formed overlying the second region and the second mask. A first N-type implant is performed at energy sufficient to penetrate through the first mask but insufficient to penetrate through the fourth mask. This implant provides punch through protection for P channel transistors to be formed later. A second N-type impurity is implanted into the surface at an implant energy insufficient to penetrate through the first mask to provided field doping. The silicon substrate is then oxidized to form a field oxide at portions of the first and second surface regions which are not covered by the first and second masks.

    摘要翻译: 公开了一种制造互补绝缘栅场效应晶体管的方法,其包括掺杂场隔离区和可选的穿通保护。 在本发明的一个实施例中,提供了具有N型和P型表面区域的硅衬底。 形成覆盖两个表面区域的有效区域的第一和第二掩模。 然后形成覆盖第一区域和第一掩模的第三掩模。 P型杂质以足以穿透第二掩模但不能透过第三掩模的注入能量注入第二区域。 以不足以穿过任一掩模的植入能量来执行第二P型植入物。 第一种植入物将有助于防止穿透,而第二种植入物则会涂覆场区域。 然后形成覆盖第二区域和第二掩模的第四掩模。 以足以穿透第一掩模但不足以穿透第四掩模的能量进行第一N型植入物。 该种植体为稍后形成的P沟道晶体管提供穿通保护。 以不足以穿透第一掩模的注入能量将第二N型杂质注入表面,以提供场掺杂。 然后在不被第一和第二掩模覆盖的第一表面区域和第二表面区域的部分处,氧化硅衬底以形成场氧化物。

    Multilayer trench isolation process and structure
    4.
    发明授权
    Multilayer trench isolation process and structure 失效
    多层沟槽隔离工艺及结构

    公开(公告)号:US4855804A

    公开(公告)日:1989-08-08

    申请号:US271145

    申请日:1988-11-14

    IPC分类号: H01L21/314 H01L21/762

    CPC分类号: H01L21/76229 H01L21/3145

    摘要: Dielectric filled isolation walls for semiconductor devices and integrated circuits of improved characteristics and ease of manufacture are formed by etching trenches in a semiconductor substrate and refilling the trenches with multiple layers of silicon oxy-nitride. Alternative oxygen rich and nitrogen rich oxy-nitride layers are used. For the narrowest trenches two layers suffice. Where trenches of different widths are present the wider trenches receive multiple layer pairs. A cap layer of oxy-nitride is added to insure filling of any trench intersections. The oxy-nitride desirably has a composition Si.sub.x O.sub.y N.sub.z where x, y, and z are in the range of 0.25-0.4, 0.27-0.6, and 0.0-0.35, respectively, for the oxygen rich material and where x, y, and z are in the range 0.35-0.43m 0.0-0.35, and 0.28-0.6, respectively, for the nitrogen rich material, expressed in atomic fraction and x+y+z=1. Both compositions of oxy-nitride are formed in the same LPCVD reactor by changing the conditions during layer deposition.

    摘要翻译: 通过蚀刻半导体衬底中的沟槽并用多层氮氧化硅再填充沟槽,形成具有改善的特性和易于制造的用于半导体器件和集成电路的介电填充隔离壁。 使用富氧和富氮的氧氮化物层。 对于最窄的沟槽,两层就够了。 在存在不同宽度的沟槽的情况下,较宽的沟槽接收多层对。 添加氮氧化物的盖层以确保填充任何沟槽交点。 氮氧化合物理想地具有组成为SixOyNz,其中x,y和z分别为富氧材料的0.25-0.4,0.27-0.6和0.0-0.35,其中x,y和z分别为 对于富含氮的材料,分别为0.35-0.43μm0.0-0.35和0.28-0.6,以原子分数表示,x + y + z = 1。 通过在层沉积期间改变条件,在相同的LPCVD反应器中形成氮氧化物的两种组成。