公开(公告)号：US20090086835A1

公开(公告)日：2009-04-02

申请号：US11934492

申请日：2007-11-02

申请人： Young Sun Han ,  Peter Harliman ,  Seon Wook Kim ,  Byung Gueon Min

发明人： Young Sun Han ,  Peter Harliman ,  Seon Wook Kim ,  Byung Gueon Min

IPC分类号： H04L27/28

CPC分类号： H03M13/2792 ,  H03M13/2703 ,  H03M13/655

摘要： A block interleaving apparatus for block interleaving M-bit input streams to be transferred with a modulus k using a mixed radix system in a multi-band orthogonal frequency division multiplexing communication system, including an array processor having an array including M cells in which the number of columns is k and the number of rows is M/k. The array processor inputs the input streams from the bottom-right cell up to the top-left last cell in the horizontal direction, and, after the first bit of the input streams reaches the last cell, generates interleaved output streams by changing the output of the array processor from horizontal direction to vertical direction.

摘要翻译： 一种块交织装置，用于在多频带正交频分复用通信系统中使用混合小数系统块模块交织M位输入流以使用混合小数系统进行传输，包括阵列处理器，阵列处理器具有包括M个单元的阵列， 的列为k，行数为M / k。 阵列处理器将输入流从右下角单元格输入到左上角单元格的水平方向，并且在输入流的第一位到达最后一个单元格之后，通过改变输出流的输出 阵列处理器从水平方向到垂直方向。

公开(公告)号：US06631459B1

公开(公告)日：2003-10-07

申请号：US09644642

申请日：2000-08-24

申请人： Kyung Youn Cho ,  Jong Yoon Lim ,  Geun Taek Lee ,  Hyeong Cheol Oh ,  Hyun Gyu Kim ,  Byung Gueon Min ,  Heui Lee

发明人： Kyung Youn Cho ,  Jong Yoon Lim ,  Geun Taek Lee ,  Hyeong Cheol Oh ,  Hyun Gyu Kim ,  Byung Gueon Min ,  Heui Lee

IPC分类号： G06F928

CPC分类号： G06F9/3802 ,  G06F9/30149 ,  G06F9/3016 ,  G06F9/30185

摘要： An apparatus includes an instruction word storage for storing a plurality of general instruction words and extended instruction words, a temporary storage unit including a plurality of buffers for pre-fetching and storing the plurality of instruction words from the instruction word storage, an instruction word search unit for receiving and decoding the plurality of instruction words pre-fetched and outputting a position signal of a general instruction word and the positions of one or more successive extended instruction words stored in the temporary storage a selector for selecting a buffer in which a general instruction word is stored and outputting the general instruction word sequentially, according to the position signal a general instruction word parser for receiving a general instruction word from the selector and outputting a plurality of control signals for executing the general instruction word simultaneously, an extended data parser is provided for performing an operational processing of operands of one or more successive extended instruction words stored in each buffer of the temporary storage according to the position signal.

摘要翻译： 一种装置，包括用于存储多个通用指令字和扩展指令字的指令字存储器，包括用于从指令字存储器预取和存储多个指令字的多个缓冲器的临时存储单元，指令字搜索 单元，用于接收和解码预取的多个指令字，并输出一般指令字的位置信号和存储在临时存储器中的一个或多个连续扩展指令字的位置，选择器用于选择缓冲器，其中一般指令 存储字，并根据位置信号顺序地输出一般指令字，一般指令字解析器用于从选择器接收一般指令字并输出用于同时执行通用指令字的多个控制信号，扩展数据解析器是 提供用于执行操作p 根据位置信号对存储在临时存储器的每个缓冲器中的一个或多个连续扩展指令字的操作数进行处理。

公开(公告)号：US20110083055A1

公开(公告)日：2011-04-07

申请号：US12580544

申请日：2009-10-16

申请人： Jun HEO ,  Kwangseok NOH ,  Byung Gueon MIN

发明人： Jun HEO ,  Kwangseok NOH ,  Byung Gueon MIN

IPC分类号： H03M13/29 ,  G06F11/10

CPC分类号： H03M13/1105 ,  H03M13/19 ,  H03M13/29 ,  H03M13/3761

摘要： The present invention relates to a decoding method for a raptor codes using system, which is capable of improving performance of the system and limiting increase in the amount of computation by grouping variable nodes if raptor codes are unsuccessfully decoded, to thereby increase a conjecture efficiency of variable node values. The decoding method is capable of improving performance of the system by making it possible to achieve performance improvement and additional reduction of the amount of computation even under an application of MP decoding by grouping variable nodes whose values cannot be known when decoded, dividing groups of variable nodes into sub groups, and conjecturing and recovering the variable nodes in a manner to exclude sub groups which do not satisfy check node equation.

摘要翻译： 本发明涉及一种用于猛禽码使用系统的解码方法，其能够提高系统的性能，并且通过对突发器代码未成功解码时对可变节点进行分组来限制计算量的增加，从而增加猜测效率 变量节点值。 该解码方法能够通过对在解码时不能知道其值的变量节点进行分组，即使在MP解码的应用中也能够实现性能改善和额外的计算量的减少，从而能够提高系统的性能。 节点变成子组，并以排除不满足校验节点方程的子组的方式推测和恢复变量节点。

公开(公告)号：US20100105316A1

公开(公告)日：2010-04-29

申请号：US12257150

申请日：2008-10-23

申请人： DoHoon KIM ,  Young-Chai Ko ,  Byung Gueon Min

发明人： DoHoon KIM ,  Young-Chai Ko ,  Byung Gueon Min

IPC分类号： H04B7/14

CPC分类号： H04W16/06 ,  H04B7/15578 ,  H04W28/08 ,  H04W28/16 ,  H04W84/047 ,  H04W88/04

摘要： A Multiple-Input Multiple-Output (MIMO) relay system is provided. The MIMO relay system performs signal processing to provide requested real data to at least one selected user mobile station sequentially connected to a first relay station located in a first cell and a second relay station located in a second cell using spare frequency capacity allocated to a first base station of the first cell instead of a second base station of the second cell that drops the requested real data due to its frequency capacity being exceeded, thereby improving reliability of seamless real data input/output in relay communication, reducing call drop probability, and raising availability of frequency capacity by automatically adjusting frequency capacity allocated between cells.

摘要翻译： 提供了多输入多输出（MIMO）中继系统。 MIMO中继系统执行信号处理，以向至少一个所选择的用户移动台提供所请求的实际数据，所述至少一个选定的用户移动站顺序地连接到位于第一小区中的第一中继站，以及位于第二小区中的第二中继站， 第一小区的基站而不是由于其频率容量被超过而丢弃所请求的实际数据的第二小区的第二基站，从而提高中继通信中无缝实际数据输入/输出的可靠性，减少呼叫丢弃概率，以及 通过自动调整小区间分配的频率容量，提高频率容量的可用性。

公开(公告)号：US20090060079A1

公开(公告)日：2009-03-05

申请号：US11934482

申请日：2007-11-02

申请人： Sang Ho CHOI ,  Young Chai Ko ,  Jun Heo ,  Byung Gueon Min

发明人： Sang Ho CHOI ,  Young Chai Ko ,  Jun Heo ,  Byung Gueon Min

IPC分类号： H04L23/02

CPC分类号： H04L25/03203 ,  H04L25/0204 ,  H04L25/0242 ,  H04L25/0246 ,  H04L2025/03426

摘要： Disclosed is a method for detecting a symbol using a trellis structure on a multiple input multiple output (MIMO) mobile communication system. The method includes the steps of: setting a plurality of states by grouping symbols producible from a receiving signal in the unit of sub-states; calculating metric values for paths inputted to the sub-states and selecting paths having the calculated metric values smaller than a preset first threshold, as first surviving paths; setting a second threshold based on an accumulated metric value of a path having the smallest accumulated metric in each of the states; and selecting paths having metric value smaller than the second threshold, as second surviving paths, among the first surviving paths selected for each state.

摘要翻译： 公开了一种在多输入多输出（MIMO）移动通信系统上使用网格结构检测符号的方法。 该方法包括以下步骤：通过以子状态为单位分组从接收信号产生的符号来设置多个状态; 计算输入到子状态的路径的度量值，以及选择具有小于预置的第一阈值的计算度量值的路径作为第一存活路径; 基于每个状态中具有最小累积度量的路径的累积度量值设置第二阈值; 以及在为每个状态选择的第一幸存路径中，选择具有小于第二阈值的度量值的路径作为第二存活路径。

公开(公告)号：US20100061351A1

公开(公告)日：2010-03-11

申请号：US12257133

申请日：2008-10-23

申请人： Won Cheol LEE ,  Joo Pyoung CHOI ,  Soon Kyu PARK ,  Su Bok LEE ,  Byung Gueon MIN

发明人： Won Cheol LEE ,  Joo Pyoung CHOI ,  Soon Kyu PARK ,  Su Bok LEE ,  Byung Gueon MIN

IPC分类号： H04W72/04 ,  H04B7/00

CPC分类号： H04W52/242 ,  H04W16/32 ,  H04W72/0453 ,  H04W72/082

摘要： A multi-coexistence communication technology is provided. A multi-coexistence communication system based on an interference-aware environment and a method for operating the same can remove interference detected using an interference temperature limit from at least one transmission signal and transmit the signal to a main/sub communication terminal during data communication on a wired/wireless communication network formed of a main base station, a sub base station, the main communication terminal, and the sub communication terminal, thereby smoothly providing a high-speed seamless data transmission service based on a multi-coexistence communication environment where a distributed small-scale network requiring a low transmission rate, a medium-scale network for providing various wireless communication services, and a large-scale broadcasting network requiring a high transmission rate and high quality coexist, and preventing congestion due to increased demand for frequency resources.

摘要翻译： 提供了多共存通信技术。 基于干扰感知环境的多共存通信系统及其操作方法可以从至少一个传输信号中去除使用干扰温度限制检测到的干扰，并且在数据通信期间将信号发送到主/子通信终端 由主基站，子基站，主通信终端和子通信终端形成的有线/无线通信网络，从而平滑地提供基于多共存通信环境的高速无缝数据传输服务，其中， 需要低传输速率的分布式小规模网络，用于提供各种无线通信服务的中等规模网络，以及需要高传输速率和高质量并存的大规模广播网络，并且防止由于对频率资源的需求增加而引起的拥塞 。

公开(公告)号：US07511642B1

公开(公告)日：2009-03-31

申请号：US11934492

申请日：2007-11-02

申请人： Young Sun Han ,  Peter Harliman ,  Seon Wook Kim ,  Byung Gueon Min

发明人： Young Sun Han ,  Peter Harliman ,  Seon Wook Kim ,  Byung Gueon Min

IPC分类号： H03M7/00

CPC分类号： H03M13/2792 ,  H03M13/2703 ,  H03M13/655

摘要： A block interleaving apparatus for block interleaving M-bit input streams to be transferred with a modulus k using a mixed radix system in a multi-band orthogonal frequency division multiplexing communication system, including an array processor having an array including M cells in which the number of columns is k and the number of rows is M/k. The array processor inputs the input streams from the bottom-right cell up to the top-left last cell in the horizontal direction, and, after the first bit of the input streams reaches the last cell, generates interleaved output streams by changing the output of the array processor from horizontal direction to vertical direction.

摘要翻译： 一种块交织装置，用于在多频带正交频分复用通信系统中使用混合小数系统块模块交织M位输入流以使用混合小数系统进行传输，包括阵列处理器，阵列处理器具有包括M个单元的阵列， 的列为k，行数为M / k。 阵列处理器将输入流从右下角单元格输入到左上角单元格的水平方向，并且在输入流的第一位到达最后一个单元格之后，通过改变输出流的输出 阵列处理器从水平方向到垂直方向。

公开(公告)号：US06184907B2

公开(公告)日：2001-02-06

申请号：US09102807

申请日：1998-06-23

申请人： Byung-Gueon Min

发明人： Byung-Gueon Min

IPC分类号： G06F1316

CPC分类号： G06T3/4007 ,  G09G5/363 ,  G09G5/395

摘要： A graphics subsystem utilizes a single port DRAM as a frame buffer, which has an r-bit wide data access port and stores video data that are generated by an application program executed on a host processor. The graphics subsystem includes a first-in first-out (FIFO) buffer for storing the video data from the frame buffer, and a scan interpolator for performing vertical and horizontal interpolation of data read from the FIFO buffer with respect to a predetermined number of adjacent scan lines on a video frame. By interpolating adjacent scan lines in real time, it is possible to obtain high-quality images on a computer or television display.

摘要翻译： 图形子系统利用单端口DRAM作为帧缓冲器，其具有r位宽的数据访问端口并存储由在主处理器上执行的应用程序生成的视频数据。 图形子系统包括用于存储来自帧缓冲器的视频数据的先进先出（FIFO）缓冲器和用于对从FIFO缓冲器读取的数据相对于预定数量的相邻的数据执行垂直和水平插值的扫描插值器 在视频帧上扫描线。 通过实时内插相邻扫描线，可以在计算机或电视显示器上获得高质量的图像。