公开(公告)号：US5606666A

公开(公告)日：1997-02-25

申请号：US277394

申请日：1994-07-19

申请人： Carl H. Grant ,  Jace W. Krull ,  Charles E. Kuhlmann ,  Shahram Salamian ,  Eugene M. Thomas ,  James T. Tsevdos

发明人： Carl H. Grant ,  Jace W. Krull ,  Charles E. Kuhlmann ,  Shahram Salamian ,  Eugene M. Thomas ,  James T. Tsevdos

IPC分类号： G06F15/16 ,  G06F13/00 ,  G06F15/17 ,  G06F15/177 ,  H04L29/06 ,  H04L29/08

CPC分类号： G06F15/17 ,  H04L29/06 ,  H04L69/32

摘要： A computer system is provided in which asynchronously operating processing elements in the system are connected by means of an interconnection media so as to permit communication between an executing program on one of the processing elements with the memory on another processing element. Inter-processing communication logic located on each of the processing elements permits communication between executing programs on any one processing element. Inter-delivery support hardware is provided for interfacing between the interconnection media and the inter-processing communication logic. The inter-delivery support hardware operates asynchronously with respect to the executing programs on the processing elements for (i) enqueuing control elements obtained by a function on a first processing element from physical memory on the first processing element; (ii) temporarily storing the enqueued control elements in a first memory device associated with the first processing element; (iii) copying over the interconnection media via a copy transaction the temporarily stored control elements from the first memory device to a second memory device associated with a second processing element; and (iv) dequeuing the copied control elements from the second memory device to physical memory on the second processing element.

摘要翻译： 提供了一种计算机系统，其中系统中的异步操作处理元件通过互连介质连接，以便允许处理元件之一上的执行程序与另一个处理元件上的存储器之间进行通信。 位于每个处理元件上的处理间通信逻辑允许在任何一个处理元件上执行程序之间的通信。 交互支持硬件被提供用于在互连介质和处理间通信逻辑之间进行接口。 交付支持硬件相对于处理元件上的执行程序异步地操作，用于（i）通过第一处理元件上的物理存储器对通过第一处理元件的功能获得的控制元素进行排队; （ii）将入队控制元件临时存储在与第一处理元件相关联的第一存储器件中; （iii）通过复制事务将临时存储的控制元件从第一存储器设备复制到互连介质到与第二处理元件相关联的第二存储器设备; 以及（iv）将复制的控制元件从第二存储器装置出发到第二处理元件上的物理存储器。

公开(公告)号：US4275440A

公开(公告)日：1981-06-23

申请号：US948070

申请日：1978-10-02

申请人： Robert L. Adams, Jr. ,  Carl H. Grant ,  Karl W. Stevens

发明人： Robert L. Adams, Jr. ,  Carl H. Grant ,  Karl W. Stevens

IPC分类号： G06F13/12 ,  G06F9/46 ,  G06F13/34 ,  G06F3/00

CPC分类号： G06F13/34

摘要： An improved I/O interrupt sequencing method and apparatus including generation of an instruction priority request signal to indicate that a real time task requires programmed I/O service. Generating an end of chain signal to suspend burst I/O control of the I/O bus and allow programmed I/O service to a real time device, and resetting the instruction priority request signal to allow burst mode data transfer to continue at the count positions at which it was suspended.

摘要翻译： 一种改进的I / O中断排序方法和装置，包括生成指示优先级请求信号以指示实时任务需要编程的I / O服务。 产生链信号的结束以暂停I / O总线的突发I / O控制，并允许对实时设备进行编程的I / O服务，并重置指令优先级请求信号，以允许突发模式数据传输在计数 暂停的职位。