Semiconductor device with reticle specific implant verification indicator
    1.
    发明授权
    Semiconductor device with reticle specific implant verification indicator 失效
    具有掩模版专用植入物验证指示器的半导体器件

    公开(公告)号:US5594258A

    公开(公告)日:1997-01-14

    申请号:US382811

    申请日:1995-02-03

    摘要: A semiconductor device and method of making same which includes a semiconductor substrate having a moat region with an ion implant in the moat region and a window in the substrate spaced from the moat region, electrically decoupled therefrom and having an ion implant therein in the form of a predetermined pattern. The moat region can contain one or more active and/or passive components therein. The method of fabrication comprises providing a semiconductor wafer, forming a moat region and an associated window region on the wafer, forming at least portions of electrical devices in the moat region by implanting ions therein, forming a predetermined non-electrical component pattern in the window by implanting ions in the window concurrently with the implanting of ions in the moat and completing fabrication of at least one electrical component in the moat region. Implants are verified by the above described device and selectively etching the window with an etchant selective to one of the substrate with ion implant therein and the substrate without ion implant therein to provide the pattern at a different level from the remainder of the window. The pattern is a non-electrical component pattern and the etchant is preferably selective to the portion of the window with ion implant to cause the pattern to lie below the portion of the window without ion implant.

    摘要翻译: 一种半导体器件及其制造方法,其包括半导体衬底,该半导体衬底具有在护环区域中具有离子注入的护环区域和与护环区域间隔开的衬底中的窗口,并与其隔离并且以其形式存在离子注入 预定图案。 护城河区域可以包含其中的一个或多个主动和/或无源部件。 制造方法包括提供半导体晶片,在晶片上形成护环区域和相关窗口区域,通过在其中注入离子形成护环区域中的电气设备的至少部分,在窗口中形成预定的非电气元件图案 通过将离子注入到窗口中并与护环中的离子注入同时完成,并完成护城河区域中的至少一个电气部件的制造。 通过上述装置验证植入物,并用其中具有离子注入的衬底中的一个衬底选择性蚀刻窗口,并且在其中没有离子注入的衬底以提供与窗口的其余部分不同的水平的图案。 该图案是非电子部件图案,并且蚀刻剂优选地对于具有离子注入的窗口部分是选择性的,以使得图案位于窗口的部分下方,而不需要离子注入。

    Method of forming implant indicators for implant verification
    2.
    发明授权
    Method of forming implant indicators for implant verification 失效
    用于植入物验证的植入物指示器的形成方法

    公开(公告)号:US5403753A

    公开(公告)日:1995-04-04

    申请号:US92043

    申请日:1993-07-15

    摘要: A semiconductor device and method of making same which includes a semiconductor substrate having a moat region with an ion implant in the moat region and a window in the substrate spaced from the moat region, electrically decoupled therefrom and having an ion implant therein in the form of a predetermined pattern. The moat region can contain one or more active and/or passive components therein. The method of fabrication comprises providing a semiconductor wafer, forming a moat region and an associated window region on the wafer, forming at least portions of electrical devices in the moat region by implanting ions therein, forming a predetermined non-electrical component pattern in the window by implanting ions in the window concurrently with the implanting of ions in the moat and completing fabrication of at least one electrical component in the moat region. Implants are verified by the above described device and selectively etching the window with an etchant selective to one of the substrate with ion implant therein and the substrate without ion implant therein to provide the pattern at a different level from the remainder of the window. The pattern is a non-electrical component pattern and the etchant is preferably selective to the portion of the window with ion implant to cause the pattern to lie below the portion of the window without ion implant.

    摘要翻译: 一种半导体器件及其制造方法,其包括半导体衬底,该半导体衬底具有在护环区域中具有离子注入的护环区域和与护环区域间隔开的衬底中的窗口,并与其隔离并且以其形式存在离子注入 预定图案。 护城河区域可以包含其中的一个或多个主动和/或无源部件。 制造方法包括提供半导体晶片,在晶片上形成护环区域和相关窗口区域,通过在其中注入离子形成护环区域中的电气设备的至少部分,在窗口中形成预定的非电气元件图案 通过将离子注入到窗口中并与护环中的离子注入同时完成,并完成护城河区域中的至少一个电气部件的制造。 通过上述装置验证植入物,并用其中具有离子注入的衬底中的一个衬底选择性蚀刻窗口,并且在其中没有离子注入的衬底以提供与窗口的其余部分不同的水平的图案。 该图案是非电子部件图案,并且蚀刻剂优选地对于具有离子注入的窗口部分是选择性的,以使得图案位于窗口的部分下方,而不需要离子注入。

    Planarization of LOCOS through recessed reoxidation techniques
    3.
    发明授权
    Planarization of LOCOS through recessed reoxidation techniques 有权
    LOCOS通过凹陷式再氧化技术进行平面化

    公开(公告)号:US06265286B1

    公开(公告)日:2001-07-24

    申请号:US09190747

    申请日:1998-11-12

    IPC分类号: H01L2176

    CPC分类号: H01L21/76221

    摘要: A method of fabricating a semiconductor device which includes providing a silicon substrate having a patterned mask thereover to expose a portion of the surface of the substrate. The exposed surface portion is oxidized to form a sacrificial silicon oxide region to a predetermined depth in the substrate at the exposed portions of the substrate. The sacrificial silicon oxide is then removed by a HF etch and a second region of silicon oxide is formed in the substrate in the region from which the sacrificial silicon oxide was removed. The step of removing the silicon oxide also includes removing a portion of the pad oxide. The sacrificial silicon oxide has a thickness less than the second region of silicon oxide which is from about 10 percent to about 30 percent of the thickness of the second region of silicon oxide. The oxidation steps are thermal oxidation steps in an oxygen-containing ambient.

    摘要翻译: 一种制造半导体器件的方法,其包括提供其上具有图案化掩模的硅衬底以暴露衬底的表面的一部分。 暴露的表面部分被氧化以在衬底的暴露部分处在衬底中形成预定深度的牺牲氧化硅区域。 然后通过HF蚀刻去除牺牲氧化硅,并且在去除牺牲氧化硅的区域中的衬底中形成第二氧化硅区域。 去除硅氧化物的步骤还包括去除一部分衬垫氧化物。 牺牲氧化硅的厚度小于氧化硅的第二区域,其厚度为氧化硅第二区域厚度的约10%至约30%。 氧化步骤是含氧环境中的热氧化步骤。

    Method of implant verification in semiconductor device using reticle
specific indicator
    4.
    发明授权
    Method of implant verification in semiconductor device using reticle specific indicator 失效
    使用掩模版专用指示器的半导体器件中的植入物验证方法

    公开(公告)号:US5705404A

    公开(公告)日:1998-01-06

    申请号:US712654

    申请日:1996-09-13

    摘要: A semiconductor device and method of making same which includes a semiconductor substrate having a moat region with an ion implant in the moat region and a window in the substrate spaced from the moat region, electrically decoupled therefrom and having an ion implant therein in the form of a predetermined pattern. The moat region can contain one or more active and/or passive components therein. The method of fabrication comprises providing a semiconductor wafer, forming a moat region and an associated window region on the wafer, forming at least portions of electrical devices in the moat region by implanting ions therein, forming a predetermined non-electrical component pattern in the window by implanting ions in the window concurrently with the implanting of ions in the moat and completing fabrication of at least one electrical component in the moat region. Implants are verified by the above described device and selectively etching the window with an etchant selective to one of the substrate with ion implant therein and the substrate without ion implant therein to provide the pattern at a different level from the remainder of the window. The pattern is a non-electrical component pattern and the etchant is preferably selective to the portion of the window with ion implant to cause the pattern to lie below the portion of the window without ion implant.

    摘要翻译: 一种半导体器件及其制造方法,其包括半导体衬底,该半导体衬底具有在护环区域中具有离子注入的护环区域和与护环区域间隔开的衬底中的窗口,并与其隔离并且以其形式存在离子注入 预定图案。 护城河区域可以包含其中的一个或多个主动和/或无源部件。 制造方法包括提供半导体晶片,在晶片上形成护环区域和相关窗口区域,通过在其中注入离子形成护环区域中的电气设备的至少部分,在窗口中形成预定的非电气元件图案 通过将离子注入到窗口中并与护环中的离子注入同时完成,并完成护城河区域中的至少一个电气部件的制造。 通过上述装置验证植入物,并用其中具有离子注入的衬底中的一个衬底选择性蚀刻窗口,并且在其中没有离子注入的衬底以提供与窗口的其余部分不同的水平的图案。 该图案是非电子部件图案,并且蚀刻剂优选地对于具有离子注入的窗口部分是选择性的,以使得图案位于窗口的部分下方,而不需要离子注入。