公开(公告)号：US20100020114A1

公开(公告)日：2010-01-28

申请号：US12500225

申请日：2009-07-09

申请人： Woo-nyoung Lee ,  Chang-hwe Choi ,  Chon-wook Park

发明人： Woo-nyoung Lee ,  Chang-hwe Choi ,  Chon-wook Park

IPC分类号： G09G5/10

CPC分类号： G09G3/3688 ,  G09G3/2011

摘要： A display driver integrated circuit (IC) includes a grayscale voltage generator, a main decoder unit, a pre-decoder unit, and an output buffer unit. The grayscale voltage generator is configured to receive at least one gamma reference voltage and generate a plurality of grayscale voltages. The main decoder unit is configured to receive the grayscale voltages and data, decode the data, and selectively output a grayscale voltage based on the decoded result. The pre-decoder unit is configured to decode part of the data and output a precharge voltage. The output buffer unit is configured to sequentially receive an output of the pre-decoder unit and an output of the main-decoder unit, and output grayscale data used for driving a display device.

摘要翻译： 显示驱动器集成电路（IC）包括灰度级电压发生器，主解码器单元，预解码器单元和输出缓冲器单元。 灰度电压发生器被配置为接收至少一个伽马参考电压并产生多个灰度级电压。 主解码器单元被配置为接收灰度电压和数据，解码数据，并且基于解码结果选择性地输出灰度电压。 预解码器单元被配置为对部分数据进行解码并输出预充电电压。 输出缓冲器单元被配置为顺序地接收预解码器单元的输出和主解码器单元的输出，以及输出用于驱动显示设备的灰度数据。

公开(公告)号：US20080284493A1

公开(公告)日：2008-11-20

申请号：US12149808

申请日：2008-05-08

申请人： Seung Hwan Baek ,  Chang Hwe Choi ,  Hyung Tae Kim

发明人： Seung Hwan Baek ,  Chang Hwe Choi ,  Hyung Tae Kim

IPC分类号： H03K3/42

CPC分类号： G05F3/30

摘要： A proportional to absolute temperature (PTAT) current generation circuit may include a current mirror unit and/or a level control unit. The current mirror unit may be connected between a first power supply voltage, a first node, and/or a second node. The level control unit may be connected between the first node, the second node, and/or a second power supply voltage. The level control unit may be configured to control a level of an output current of the current mirror unit based on a voltage level of the first node and a voltage level of the second node. The level control unit may include a first transistor connected between the first node and the second power supply voltage, at least one second transistor connected between the second node and a third node, the at least one second transistor configured to operate in a weak inversion region, and/or a third transistor connected between the third node and the second power supply voltage.

摘要翻译： 与绝对温度（PTAT）电流产生电路成正比可以包括电流镜单元和/或电平控制单元。 电流镜单元可以连接在第一电源电压，第一节点和/或第二节点之间。 电平控制单元可以连接在第一节点，第二节点和/或第二电源电压之间。 电平控制单元可以被配置为基于第一节点的电压电平和第二节点的电压电平来控制电流镜单元的输出电流的电平。 电平控制单元可以包括连接在第一节点和第二电源电压之间的第一晶体管，连接在第二节点和第三节点之间的至少一个第二晶体管，所述至少一个第二晶体管被配置为在弱反转区域 ，和/或连接在第三节点和第二电源电压之间的第三晶体管。

公开(公告)号：US07436381B2

公开(公告)日：2008-10-14

申请号：US10966274

申请日：2004-10-15

申请人： Kyung-Myun Kim ,  Chang-Hwe Choi

发明人： Kyung-Myun Kim ,  Chang-Hwe Choi

IPC分类号： G09G3/36

CPC分类号： G09G3/3688 ,  G09G3/3648 ,  G09G2310/0291 ,  G09G2330/08 ,  Y10S345/904

摘要： A source driver circuit provides a source driving signal to a disconnected source line. The source driver circuit includes a shift register, a latch unit, a DAC unit, a buffer unit, and a source line repair circuit. A source line repair circuit receives a common voltage signal and a source driving signal corresponding to the disconnected source line, selects an amplifier having a same polarity type as a polarity type of an amplifier constituting the buffer unit in response to a source driving signal to provide an output signal of the selected amplifier to the disconnected source line. The source driver circuit includes the source line repair circuit which may select the amplifier having the same polarity as the polarity of the amplifier of the buffer, and thus may safely provide the source driving signal to the disconnected source line.

摘要翻译： 源极驱动器电路向源极线提供源极驱动信号。 源极驱动器电路包括移位寄存器，锁存单元，DAC单元，缓冲单元和源极线修复电路。 源极线修复电路接收与断开的源极线相对应的公共电压信号和源极驱动信号，响应于源极驱动信号选择具有与组成缓冲器单元的极性类型相同的极性类型的放大器，以提供 所选择的放大器到断开的源极线的输出信号。 源极驱动器电路包括可以选择具有与缓冲器的放大器的极性相同极性的放大器的源极线修复电路，从而可以安全地将源极驱动信号提供给断开的源极线。

公开(公告)号：US20100002019A1

公开(公告)日：2010-01-07

申请号：US12394482

申请日：2009-02-27

申请人： Woo-Nyoung Lee ,  Chang-Hwe Choi ,  Jeung-Tae Park ,  Hyung-Tae Kim ,  Jeong-Ah Ahn

发明人： Woo-Nyoung Lee ,  Chang-Hwe Choi ,  Jeung-Tae Park ,  Hyung-Tae Kim ,  Jeong-Ah Ahn

IPC分类号： G09G5/10 ,  H03M1/66

CPC分类号： H03M1/664 ,  G09G3/3688 ,  G09G2310/027

摘要： A digital to analog converter includes a first decoder, a gamma reference voltage decoder unit and an active resistor string unit. The first decoder receives 2(N-2) first gamma voltages and selects 2(N-2-P) second gamma voltages among the first gamma voltages in response to P bit data, where N is an odd number not less than 9, and N−1=2P. The gamma reference voltage decoder unit selects successive two high gamma tab voltages among N high gamma tab voltages in response to the P bit data and provides the selected successive two high gamma tab voltages as a first gamma reference voltage and a second gamma reference voltage. The active resistor string unit divides the first gamma reference voltage and the second gamma reference voltage and provides 2(N-2) grayscale voltages.

摘要翻译： 数模转换器包括第一解码器，伽马参考电压解码器单元和有源电阻串单元。 第一解码器响应于P位数据而接收2（N-2）个第一伽马电压并选择第一伽马电压中的2（N-2-P）个第二伽马电压，其中N是不小于9的奇数，以及 N-1 = 2P。 伽马参考电压解码器单元响应于P位数据选择N个高伽马片电压中的连续的两个高伽马片电压，并将所选择的连续两个高伽马片电压提供为第一伽马参考电压和第二伽马参考电压。 有源电阻串单元划分第一伽马参考电压和第二伽马参考电压，并提供2（N-2）个灰度级电压。

公开(公告)号：US07616183B2

公开(公告)日：2009-11-10

申请号：US11298913

申请日：2005-12-09

申请人： Chang-Hwe Choi

发明人： Chang-Hwe Choi

IPC分类号： G09G3/36

CPC分类号： G09G3/3688 ,  G09G3/2011 ,  G09G2310/027 ,  G09G2310/0297

摘要： A source driving circuit includes a shift register, a data latch circuit, a D/A converter, and a sample-and-hold circuit. The shift register generates an n-bit first signal in response to a clock signal and an input/output control signal, wherein n is a positive integer. The data latch circuit samples video data using the first signal to latch the sampled video data, and outputs 3×n digital signals. The D/A converter generates a plurality of analog voltage signals corresponding to the 3×n digital signals using a plurality of gray scale voltages. The sample-and-hold circuit generates 6×n sample-and-hold signals using the analog voltage signals in response to a plurality of switching control signals.

摘要翻译： 源极驱动电路包括移位寄存器，数据锁存电路，D / A转换器和采样保持电路。 移位寄存器响应于时钟信号和输入/输出控制信号产生n位第一信号，其中n是正整数。 数据锁存电路使用第一信号对视频数据进行采样以锁定采样的视频数据，并输出3×n个数字信号。 D / A转换器使用多个灰度级电压产生对应于3xn数字信号的多个模拟电压信号。 采样和保持电路响应于多个开关控制信号，使用模拟电压信号产生6×n采样和保持信号。

公开(公告)号：US07319450B2

公开(公告)日：2008-01-15

申请号：US10640245

申请日：2003-08-14

申请人： Chang-Hwe Choi

发明人： Chang-Hwe Choi

IPC分类号： G09G3/36 ,  G09G5/00

CPC分类号： G09G3/3614 ,  G09G3/3688

摘要： A method and apparatus is described that may be capable of improving picture quality of a TFT-LCD device, to prevent occurrence of a stripe phenomenon caused by an offset, i.e., differences among the voltages output from a plurality of amplifiers in a TFT-LCD source driver circuit. The method and apparatus may eliminate differences among voltages output from a plurality of amplifiers in a circuit such as a TFT-LCD source driver circuit. In the method, a panel driving voltage may be applied to a given pixel of a liquid crystal panel in response to a clock signal. The polarity of the applied panel driving voltage may be changed in response to a polarity control signal, and a switch control signal may be generated based on the polarity control signal. The switch control signal may be applied to switch first and second input ports of each of the plurality of amplifiers.

摘要翻译： 描述了可以提高TFT-LCD装置的图像质量的方法和装置，以防止由偏移引起的条纹现象的发生，即，TFT-LCD中的多个放大器输出的电压之间的差异 源驱动电路。 该方法和装置可以消除诸如TFT-LCD源极驱动电路的电路中从多个放大器输出的电压之间的差异。 在该方法中，可以响应于时钟信号将面板驱动电压施加到液晶面板的给定像素。 所施加的面板驱动电压的极性可以响应于极性控制信号而改变，并且可以基于极性控制信号来产生开关控制信号。 开关控制信号可以被施加以切换多个放大器中的每一个的第一和第二输入端口。

公开(公告)号：US20060170458A1

公开(公告)日：2006-08-03

申请号：US11319232

申请日：2005-12-28

申请人： Seung-Jung Lee ,  Do-Youn Kim ,  Chang-Hwe Choi

发明人： Seung-Jung Lee ,  Do-Youn Kim ,  Chang-Hwe Choi

IPC分类号： H03K19/094

CPC分类号： G09G3/3688 ,  G09G2310/0291 ,  H03K19/01721

摘要： An output buffer with an improved slew rate and method thereof. The output buffer may include a differential amplifier, a controller and an output unit. The output buffer may generate a pull signal and a control signal based on received input and output signals. The controller may transition an output node to a control voltage in response to the control signal and a bias voltage. The output unit may maintain the first output signal between a given voltage and the control voltage based on the pull signal and the bias voltage.

摘要翻译： 具有改进的压摆率的输出缓冲器及其方法。 输出缓冲器可以包括差分放大器，控制器和输出单元。 输出缓冲器可以基于接收到的输入和输出信号产生拉动信号和控制信号。 控制器可以响应于控制信号和偏置电压而将输出节点转换到控制电压。 输出单元可以基于拉动信号和偏置电压来保持给定电压和控制电压之间的第一输出信号。

公开(公告)号：US20060146000A1

公开(公告)日：2006-07-06

申请号：US11298913

申请日：2005-12-09

申请人： Chang-Hwe Choi

发明人： Chang-Hwe Choi

IPC分类号： G09G3/36

CPC分类号： G09G3/3688 ,  G09G3/2011 ,  G09G2310/027 ,  G09G2310/0297

摘要： A source driving circuit includes a shift register, a data latch circuit, a D/A converter, and a sample-and-hold circuit. The shift register generates an n-bit first signal in response to a clock signal and an input/output control signal, wherein n is a positive integer. The data latch circuit samples video data using the first signal to latch the sampled video data, and outputs 3×n digital signals. The D/A converter generates a plurality of analog voltage signals corresponding to the 3×n digital signals using a plurality of gray scale voltages. The sample-and-hold circuit generates 6×n sample-and-hold signals using the analog voltage signals in response to a plurality of switching control signals.

公开(公告)号：US20050110738A1

公开(公告)日：2005-05-26

申请号：US10966274

申请日：2004-10-15

申请人： Kyung-Myun Kim ,  Chang-Hwe Choi

发明人： Kyung-Myun Kim ,  Chang-Hwe Choi

IPC分类号： G02F1/133 ,  G09G3/36

CPC分类号： G09G3/3688 ,  G09G3/3648 ,  G09G2310/0291 ,  G09G2330/08 ,  Y10S345/904

摘要： A source driver circuit provides a source driving signal to a disconnected source line. The source driver circuit includes a shift register, a latch unit, a DAC unit, a buffer unit, and a source line repair circuit. A source line repair circuit receives a common voltage signal and a source driving signal corresponding to the disconnected source line, selects an amplifier having a same polarity type as a polarity type of an amplifier constituting the buffer unit in response to a source driving signal to provide an output signal of the selected amplifier to the disconnected source line. The source driver circuit includes the source line repair circuit which may select the amplifier having the same polarity as the polarity of the amplifier of the buffer, and thus may safely provide the source driving signal to the disconnected source line.

摘要翻译： 源极驱动器电路向源极线提供源极驱动信号。 源极驱动器电路包括移位寄存器，锁存单元，DAC单元，缓冲单元和源极线修复电路。 源极线修复电路接收与断开的源极线相对应的公共电压信号和源极驱动信号，响应于源极驱动信号选择具有与组成缓冲器单元的极性类型相同的极性类型的放大器，以提供 所选择的放大器到断开的源极线的输出信号。 源极驱动器电路包括可以选择具有与缓冲器的放大器的极性相同极性的放大器的源极线修复电路，从而可以安全地将源极驱动信号提供给断开的源极线。

公开(公告)号：US08994444B2

公开(公告)日：2015-03-31

申请号：US12149808

申请日：2008-05-08

申请人： Seung Hwan Baek ,  Chang Hwe Choi ,  Hyung Tae Kim

发明人： Seung Hwan Baek ,  Chang Hwe Choi ,  Hyung Tae Kim

IPC分类号： H01L35/00 ,  G05F3/30

CPC分类号： G05F3/30

摘要： A proportional to absolute temperature (PTAT) current generation circuit may include a current mirror unit and/or a level control unit. The current mirror unit may be connected between a first power supply voltage, a first node, and/or a second node. The level control unit may be connected between the first node, the second node, and/or a second power supply voltage. The level control unit may be configured to control a level of an output current of the current mirror unit based on a voltage level of the first node and a voltage level of the second node. The level control unit may include a first transistor connected between the first node and the second power supply voltage, at least one second transistor connected between the second node and a third node, the at least one second transistor configured to operate in a weak inversion region, and/or a third transistor connected between the third node and the second power supply voltage.

摘要翻译： 与绝对温度（PTAT）电流产生电路成正比可以包括电流镜单元和/或电平控制单元。 电流镜单元可以连接在第一电源电压，第一节点和/或第二节点之间。 电平控制单元可以连接在第一节点，第二节点和/或第二电源电压之间。 电平控制单元可以被配置为基于第一节点的电压电平和第二节点的电压电平来控制电流镜单元的输出电流的电平。 电平控制单元可以包括连接在第一节点和第二电源电压之间的第一晶体管，连接在第二节点和第三节点之间的至少一个第二晶体管，所述至少一个第二晶体管被配置为在弱反转区域 ，和/或连接在第三节点和第二电源电压之间的第三晶体管。