公开(公告)号：US07701179B2

公开(公告)日：2010-04-20

申请号：US11760974

申请日：2007-06-11

Applicant: Ke-Horng Chen ,  Yung-Hsin Lin ,  Cheng-Ta Yu

Inventor： Ke-Horng Chen ,  Yung-Hsin Lin ,  Cheng-Ta Yu

IPC: G05F1/24 ,  G05F1/575

CPC classification number: H02M3/1582 ,  H02M3/157 ,  H02M3/1588 ,  Y02B70/1466

Abstract: A control circuit of a multi-mode buck-boost switching regulator and a method thereof are provided. The control circuit imposes ON/OFF timing sequences on switches according to the relationship between two controlling triangle waves and the load fluctuation. In each working cycle of each mode of the regulator, at most two switches perform switching operations. The control circuit is simple to design, which only includes simple digital elements, such as comparators, logic gates etc., instead of complicated analog circuits.

Abstract translation: 提供了多模降压 - 升压开关调节器的控制电路及其方法。 控制电路根据两个控制三角波之间的关系和负载波动对开关施加ON / OFF定时序列。 在调节器的每个模式的每个工作循环中，最多两个开关执行开关操作。 控制电路设计简单，只包括简单的数字元件，比如比较器，逻辑门等，而不是复杂的模拟电路。

公开(公告)号：US20080303499A1

公开(公告)日：2008-12-11

申请号：US11760974

申请日：2007-06-11

Applicant: Ke-Horng Chen ,  Yung-Hsin Lin ,  Cheng-Ta Yu

Inventor： Ke-Horng Chen ,  Yung-Hsin Lin ,  Cheng-Ta Yu

IPC: G05F1/44

CPC classification number: H02M3/1582 ,  H02M3/157 ,  H02M3/1588 ,  Y02B70/1466

Abstract: A control circuit of a multi-mode buck-boost switching regulator and a method thereof are provided. The control circuit imposes ON/OFF timing sequences on switches according to the relationship between two controlling triangle waves and the load fluctuation. In each working cycle of each mode of the regulator, at most two switches perform switching operations. The control circuit is simple to design, which only includes simple digital elements, such as comparators, logic gates etc., instead of complicated analog circuits.

Abstract translation: 提供了多模降压 - 升压开关调节器的控制电路及其方法。 控制电路根据两个控制三角波之间的关系和负载波动对开关施加ON / OFF定时序列。 在调节器的每个模式的每个工作循环中，最多两个开关执行开关操作。 控制电路设计简单，只包括简单的数字元件，比如比较器，逻辑门等，而不是复杂的模拟电路。

公开(公告)号：US06764957B2

公开(公告)日：2004-07-20

申请号：US10064765

申请日：2002-08-15

Applicant: Cheng-Ta Yu

Inventor： Cheng-Ta Yu

IPC: H01L2131

CPC classification number: H01L21/76816 ,  H01L21/76804 ,  Y10T29/49117

Abstract: A method for forming a contact or via plug is described. A dielectric layer and a patterned photoresist layer are sequentially formed on a substrate. A portion of the exposed dielectric layer is removed to form a first opening. A first liner is formed on the surfaces of the photoresist layer. An anisotropic etching process is conducted using the first liner and the photoresist layer as a mask to remove a portion of the dielectric layer under the first opening to form a second opening incorporating the first opening. A second liner is formed on the photoresist layer covering the first liner. Then, the above etching step is repeated to form a third opening that incorporates the second opening and exposes the substrate. The second liner, the first liner and the photoresist layer are removed, and then a conductive material is filled into the third opening to form a contact or via plug.