公开(公告)号：US09099029B2

公开(公告)日：2015-08-04

申请号：US13303260

申请日：2011-11-23

申请人： Meng-Ju Wu ,  Chun-Fan Chung

发明人： Meng-Ju Wu ,  Chun-Fan Chung

IPC分类号： G06F3/048 ,  G09G3/20

CPC分类号： G09G3/2096 ,  G09G2310/027 ,  G09G2330/045 ,  G09G2330/12 ,  G09G2340/0435 ,  G09G2370/08

摘要： A control circuit for driving a display panel is disclosed. The control circuit includes a timing controller, outputting a timing control signal; and a driving module, electrically coupled to the timing controller and the display panel for driving the display panel in response to the timing control signal, and the timing controller is switchable to a modifying state according to a driving condition of the driving module. A control method for driving a display panel is also disclosed.

摘要翻译： 公开了一种用于驱动显示面板的控制电路。 控制电路包括定时控制器，输出定时控制信号; 以及驱动模块，其电连接到所述定时控制器和所述显示面板，用于响应于所述定时控制信号来驱动所述显示面板，并且所述定时控制器可根据所述驱动模块的驱动条件切换到修改状态。 还公开了一种用于驱动显示面板的控制方法。

公开(公告)号：US08644417B2

公开(公告)日：2014-02-04

申请号：US13466607

申请日：2012-05-08

申请人： Rung-Yuan Chang ,  Chun-Fan Chung

发明人： Rung-Yuan Chang ,  Chun-Fan Chung

IPC分类号： H04L25/49

CPC分类号： H04L25/4917 ,  H04L25/4923

摘要： A method for multi-level data transmission includes encoding a data signal to be transmitted into N multi-level signals in accordance with an encoding table, where the data signal is characterized with a stream of binary data segments each of which has a data length of M bits, transmitting simultaneously the N multi-level signals through N data transmission channels, respectively; and decoding the N multi-level signals into the data signal by comparing each two of the N multi-level signals transmitted through the two data transmission channels to obtain a respective bit of the M bits of each binary data segment of the data signal based on comparison between the two corresponding multi-level signals.

摘要翻译： 一种用于多级数据传输的方法包括根据编码表将待传输的数据信号编码为N个多电平信号，其中数据信号由二进制数据段流表征，每个二进制数据段的数据长度为 M位，分别通过N个数据传输通道同时发送N个多电平信号; 并通过比较通过两个数据传输通道发送的N个多电平信号中的每一个来将N个多电平信号解码为数据信号，以基于数据信号的每个二进制数据段的M位的相应位 两个对应的多电平信号之间的比较。

公开(公告)号：US20130127806A1

公开(公告)日：2013-05-23

申请号：US13446007

申请日：2012-04-13

申请人： Meng-Ju WU ,  Chun-Fan Chung ,  Yu-Hsi Ho

发明人： Meng-Ju WU ,  Chun-Fan Chung ,  Yu-Hsi Ho

IPC分类号： G09G5/00

CPC分类号： G09G3/3614 ,  G09G3/3685 ,  G09G3/3688 ,  G09G2310/0248 ,  G09G2310/027 ,  G09G2310/0289 ,  G09G2310/0291 ,  G09G2310/0294 ,  G09G2310/0297 ,  G09G2320/103

摘要： A display panel includes a switch control circuit, a first pre-charge switch circuit and a second pre-charge switch circuit. The switch control circuit is used for comparing the most significant bits (MSBs) of data signals to generate switch control signals for controlling the first and second pre-charge switch circuits, such that data lines are pre-charged through the first and second pre-charge switch circuits respectively. A method for driving a display panel is also provided herein.

摘要翻译： 显示面板包括开关控制电路，第一预充电开关电路和第二预充电开关电路。 开关控制电路用于比较数据信号的最高有效位（MSB），以产生用于控制第一和第二预充电开关电路的开关控制信号，使得数据线通过第一和第二预充电开关电路被预充电， 充电开关电路。 本文还提供了一种用于驱动显示面板的方法。

公开(公告)号：US08411018B2

公开(公告)日：2013-04-02

申请号：US13370092

申请日：2012-02-09

申请人： Chun-Fan Chung ,  Sheng-Kai Hsu

发明人： Chun-Fan Chung ,  Sheng-Kai Hsu

IPC分类号： G09G3/36

CPC分类号： G09G3/3688 ,  G09G2310/027 ,  G09G2310/0289 ,  G09G2320/0233 ,  G09G2330/021

摘要： A source driver comprising a first DAC with a positive polarity (PDAC), a second DAC with a negative polarity (NDAC), first and second operational amplifiers. Each operational amplifier is characterized with a 1st & 2nd stage and an output stage. The PDAC and NDAC are coupled to the first and second operational amplifiers through a first pair of switches. The 1st & 2nd and output stages of the first operational amplifier are coupled to the 1st & 2nd and output stages of the second operational amplifier through a second pair of switches. The first and second operational amplifiers are coupled to odd data lines and even data line through a third pair of switches.

摘要翻译： 一种源极驱动器，包括具有正极性的第一DAC（PDAC），具有负极性的第二DAC（NDAC），第一和第二运算放大器。 每个运算放大器都具有第一和第二级和输出级。 PDAC和NDAC通过第一对开关耦合到第一和第二运算放大器。 第一运算放大器的第一和第二和输出级通过第二对开关耦合到第二运算放大器的第一和第二和输出级。 第一和第二运算放大器通过第三对开关耦合到奇数数据线，甚至数据线。

公开(公告)号：US20110199369A1

公开(公告)日：2011-08-18

申请号：US12986056

申请日：2011-01-06

申请人： Chien-Fu Huang ,  Chun-Fan Chung

发明人： Chien-Fu Huang ,  Chun-Fan Chung

IPC分类号： G06F3/038

CPC分类号： G09G3/20 ,  G09G2310/0275 ,  G09G2310/08 ,  G09G2370/08

摘要： One aspect of the present invention relates to a display for displaying data. In one embodiment, the display includes a timing controller (TCON) configured to provide a plurality of data signals to be displayed, at least one clock signal and a data training code corresponding to at least one clock signal; a plurality of source drivers, each source driver configured to receive one or more corresponding data signals, the at least one clock signal and the data training code from the TCON, generate a plurality of data phase signals according to the one or more corresponding data signals, select one data signal from the plurality of data phase signals as an optimal data signal according to the data training code, and latch the one or more corresponding data signals according to the optimal data signal; and a display panel configured to display the plurality of latched data received from the plurality of source drivers.

摘要翻译： 本发明的一个方面涉及一种用于显示数据的显示器。 在一个实施例中，显示器包括定时控制器（TCON），其被配置为提供要显示的多个数据信号，至少一个时钟信号和对应于至少一个时钟信号的数据训练代码; 多个源极驱动器，每个源极驱动器被配置为从TCON接收一个或多个对应的数据信号，所述至少一个时钟信号和数据训练代码，根据所述一个或多个相应数据信号产生多个数据相位信号 根据数据训练码从多个数据相位信号中选择一个数据信号作为最佳数据信号，并根据最佳数据信号锁存一个或多个对应的数据信号; 以及显示面板，被配置为显示从所述多个源驱动器接收的所述多个锁存数据。

公开(公告)号：US20110050680A1

公开(公告)日：2011-03-03

申请号：US12551868

申请日：2009-09-01

申请人： Chun-Fan Chung ,  Sheng-Kai Hsu

发明人： Chun-Fan Chung ,  Sheng-Kai Hsu

IPC分类号： G09G5/00 ,  G09G3/36

CPC分类号： G09G3/3688 ,  G09G2310/027 ,  G09G2310/0289 ,  G09G2320/0233 ,  G09G2330/021

摘要： The present invention in one aspect relates to a source driver comprising a first digital-to-analog converter with a positive polarity (PDAC), a second digital-to-analog converter with a negative polarity (NDAC), a first operational amplifier and a second operational amplifier. Each operational amplifier is characterized with a 1st & 2nd stage and an output stage. Both the PDAC and NDAC are coupled to the first and second operational amplifiers through a first pair of switches. The 1st & 2nd and output stages of the first operational amplifier are coupled to the 1st & 2nd and output stages of the second operational amplifier through a second pair of switches. The first and second operational amplifiers are coupled to odd data lines and even data line through a third pair of switches. Further, the amplitudes of the operational voltages for the PDAC, the NDAC and the output stages first and second operational amplifiers are set to be between the supply voltage and the ground voltage. Accordingly, the power consumption and the operational temperature are substantially reduced.

摘要翻译： 本发明在一个方面涉及一种源极驱动器，其包括具有正极性的第一数模转换器（PDAC），具有负极性的第二数模转换器（NDAC），第一运算放大器和 第二运算放大器。 每个运算放大器都具有第一和第二级和输出级。 PDAC和NDAC都通过第一对开关耦合到第一和第二运算放大器。 第一运算放大器的第一和第二和输出级通过第二对开关耦合到第二运算放大器的第一和第二和输出级。 第一和第二运算放大器通过第三对开关耦合到奇数数据线，甚至数据线。 此外，PDAC，NDAC和输出级第一和第二运算放大器的工作电压的幅度被设置在电源电压和接地电压之间。 因此，功耗和操作温度显着降低。

公开(公告)号：US20100053057A1

公开(公告)日：2010-03-04

申请号：US12371957

申请日：2009-02-17

申请人： Chun-Fan CHUNG ,  Sheng-Kai Hsu

发明人： Chun-Fan CHUNG ,  Sheng-Kai Hsu

IPC分类号： G09G3/36 ,  H03K3/00

CPC分类号： G09G3/3685 ,  G09G2300/0408 ,  G09G2300/0426 ,  G09G2320/0223

摘要： A driver integrated circuit chip adapted to electrically couple with a fan-out wiring area includes a side and a plurality of output pins formed at the side. The output pins includes a first pin group and a second pin group. The first pin group is electrically coupled to the fan-out wiring area. The second pin group is located at at least one side of the first pin group and opened. The present invention also provides display substrates of flat panel display each adapted to electrically couple with a plurality of driver integrated circuit chips.

摘要翻译： 适于与扇出布线区域电耦合的驱动器集成电路芯片包括形成在侧面的侧面和多个输出销。 输出引脚包括第一引脚组和第二引脚组。 第一引脚组电耦合到扇出接线区域。 第二引脚组位于第一引脚组的至少一侧并打开。 本发明还提供了平板显示器的显示基板，每个显示基板适于与多个驱动器集成电路芯片电耦合。

公开(公告)号：US20080084371A1

公开(公告)日：2008-04-10

申请号：US11753831

申请日：2007-05-25

申请人： Chih-hsiang Yang ,  Sheng-kai Hsu ,  Chun-fan Chung

发明人： Chih-hsiang Yang ,  Sheng-kai Hsu ,  Chun-fan Chung

IPC分类号： G09G3/36

CPC分类号： G09G3/3688 ,  G09G2320/0257 ,  G09G2330/027

摘要： A liquid crystal display device for preventing residual image includes a liquid crystal panel having a plurality of pixel units for displaying an image, a detecting circuit for generating a power control signal in response to a power switching signal, and a source driver. The source driver includes a processing unit, a plurality of first switch units, and a plurality of second switch units. The processing unit is used for providing a data signal. The plurality of first switch units coupled electrically to the processing unit, are used for conducting the data signal to the plurality of pixel units when the power switching signal is at a first state. The plurality of second switch units are used for electrically connecting the plurality of pixel units when the power switching signal is at a second state.

摘要翻译： 用于防止残留图像的液晶显示装置包括具有用于显示图像的多个像素单元的液晶面板，用于响应于功率切换信号产生功率控制信号的检测电路和源极驱动器。 源极驱动器包括处理单元，多个第一开关单元和多个第二开关单元。 处理单元用于提供数据信号。 当电力切换信号处于第一状态时，多个第一开关单元电耦合到处理单元，用于将数据信号传送到多个像素单元。 当功率切换信号处于第二状态时，多个第二开关单元用于电连接多个像素单元。

公开(公告)号：US08872865B2

公开(公告)日：2014-10-28

申请号：US13281445

申请日：2011-10-26

申请人： Meng-Ju Wu ,  Chun-Fan Chung

发明人： Meng-Ju Wu ,  Chun-Fan Chung

IPC分类号： G09G5/10 ,  G09G3/36

CPC分类号： G09G3/3688 ,  G09G3/3614 ,  G09G2300/0447 ,  G09G2310/027 ,  G09G2310/0297

摘要： A pixel driving circuit includes a first pixel, a second pixel, and a data driving circuit. Each pixel includes a main region and a sub region. The main region stores a gray level voltage and the sub region stores a gray level voltage corresponding to the gray level voltage stored in the main region when the main region and the sub region display image. In the data driving circuit, first, second, third, and fourth gray level voltages are generated by means of a first selecting circuit outputting first digital data corresponding to the first pixel and second digital data corresponding to the second pixel to the corresponding digital-to-analog converters. The first, second, third, and fourth gray level voltages are distributed to the main and sub regions of the first and second pixels by a second selecting circuit, thereby reducing the number of digital-to-analog converters.

摘要翻译： 像素驱动电路包括第一像素，第二像素和数据驱动电路。 每个像素包括主区域和子区域。 主区域存储灰度级电压，并且子区域存储与主区域和子区域显示图像中存储在主区域中的灰度电压相对应的灰度级电压。 在数据驱动电路中，通过第一选择电路产生第一，第二，第三和第四灰度级电压，所述第一选择电路将对应于第一像素的第一数字数据和对应于第二像素的第二数字数据输出到相应的数字到 -analog转换器。 第一，第二，第三和第四灰度级电压通过第二选择电路分配到第一和第二像素的主区域和次区域，从而减少数模转换器的数量。

公开(公告)号：US08446400B2

公开(公告)日：2013-05-21

申请号：US12857527

申请日：2010-08-16

申请人： Meng-Ju Wu ,  Chun-Fan Chung ,  Yu-Hsi Ho

发明人： Meng-Ju Wu ,  Chun-Fan Chung ,  Yu-Hsi Ho

IPC分类号： G06F3/038 ,  G09G5/10

CPC分类号： G09G3/20 ,  G09G3/3611 ,  G09G3/3685 ,  G09G2310/0275 ,  G09G2330/06 ,  G09G2370/08

摘要： A driving apparatus for driving a display panel includes a timing controller and a plurality of source drivers. The timing controller has a first output port and a second output port. The first output port is employed to output a first clock signal and plural first data signals. The second output port is employed to output a second clock signal and plural second data signals. Each source driver includes at least two operation mode control ends for receiving an operation mode control signal having at least two bits for setting at least first to third operation modes. If the operation mode control signal sets the source driver to operate in the first operation mode, the source driver is electrically connected to both the first and second output ports, for driving the display panel according to the first data signals, the second data signals, the first clock and the second clock.

摘要翻译： 用于驱动显示面板的驱动装置包括定时控制器和多个源驱动器。 时序控制器具有第一输出端口和第二输出端口。 第一输出端口用于输出第一时钟信号和多个第一数据信号。 第二输出端口用于输出第二时钟信号和多个第二数据信号。 每个源驱动器包括至少两个操作模式控制端，用于接收具有至少两个位的操作模式控制信号，用于设置至少第一至第三操作模式。 如果操作模式控制信号将源驱动器设置为在第一操作模式下操作，则源驱动器电连接到第一和第二输出端口，用于根据第一数据信号驱动显示面板，第二数据信号， 第一个时钟和第二个时钟。